On Tue, Jul 10, 2018 at 2:51 AM Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > > Quoting Lucas De Marchi (2018-07-10 01:06:58) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > > index 1932bc227942..a5eec97a40fe 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > > @@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, > > if (!eb.engine) > > return -EINVAL; > > > > - if (args->flags & I915_EXEC_RESOURCE_STREAMER) { > > - if (!HAS_RESOURCE_STREAMER(eb.i915)) { > > - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n"); > > - return -EINVAL; > > - } > > - if (eb.engine->id != RCS) { > > - DRM_DEBUG("RS is not available on %s\n", > > - eb.engine->name); > > - return -EINVAL; > > - } > > - > > - eb.batch_flags |= I915_DISPATCH_RS; > > - } > > + if (args->flags & I915_EXEC_RESOURCE_STREAMER) > > + DRM_DEBUG("RS is removed from all Gens: ignoring.\n"); > > return -EINVAL; > > If userspace set up its batch on the assumption that RS is enabled, it > will fail. ok, > > > @@ -2657,10 +2656,7 @@ static void execlists_init_reg_state(u32 *regs, > > > > CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine), > > _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT | > > - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) | > > - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH | > > Bring back INHIBIT_SYNC_CTX_SWITCH. ugh, thanks for catching that. > > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > > index 7f5634ce8e88..179e0477dbc6 100644 > > --- a/include/uapi/drm/i915_drm.h > > +++ b/include/uapi/drm/i915_drm.h > > @@ -449,6 +449,7 @@ typedef struct drm_i915_irq_wait { > > #define I915_PARAM_SUBSLICE_TOTAL 33 > > #define I915_PARAM_EU_TOTAL 34 > > #define I915_PARAM_HAS_GPU_RESET 35 > > +/* Deprecated: do not use */ > > Don't bother. As written it implies all subsequent param are deprecated. > Userspace knows simply by the query return. ok. I'll respin a new version. Lucas De Marchi > > > #define I915_PARAM_HAS_RESOURCE_STREAMER 36 > > #define I915_PARAM_HAS_EXEC_SOFTPIN 37 > > #define I915_PARAM_HAS_POOLED_EU 38 > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx