On Fri, Jul 06, 2018 at 02:13:18PM -0700, Tarun Vyas wrote: > In commit "drm/i915: Wait for PSR exit before checking for vblank > evasion", the idea was to limit the PSR IDLE checks when PSR is > actually supported. While CAN_PSR does do that check, it doesn't > applies on a per-crtc basis. crtc_state->has_psr is a more granular > check that avoids everything but pipe A, for the PSR IDLE check. > > With this, the PSR IDLE check should be a *no-op* for all but pipe A > which is what was intended originally. > > Fixes: a608987970b9 ("drm/i915: Wait for PSR exit before checking for > vblank evasion") > > Signed-off-by: Tarun Vyas <tarun.vyas@xxxxxxxxx> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_sprite.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 4990d6e84ddf..c27720847672 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -118,7 +118,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) > * VBL interrupts will start the PSR exit and prevent a PSR > * re-entry as well. > */ > - if (CAN_PSR(dev_priv) && intel_psr_wait_for_idle(dev_priv)) > + if ((new_crtc_state->has_psr) && intel_psr_wait_for_idle(dev_priv)) > DRM_ERROR("PSR idle timed out, atomic update may fail\n"); > > local_irq_disable(); > -- > 2.13.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx