Quoting Chris Wilson (2018-06-15 19:37:33) > From: Oscar Mateo <oscar.mateo@xxxxxxxxx> > > Once upon a time, we tried to apply workarounds for registers that lived > inside the context image for every new context. That meant emitting LRI > commands soon after each context was created. > > Nowadays, we have a single golden context that gets used as a master > template for future contexts. That golden context will acquire initial > values for its image from the existing values in HW (thanks to inhibit > restore bit). If all WAs are applied normally (i.e. using MMIO writes) > before that happens, they will get soaked up by the golden context and > transmitted correctly to new contexts. > > All of this means we don't have to distinguish between context and > non-context WAs anymore, because both can be applied in the same way > (we still want to distinguish them though, because we would like to > check their validity using i-g-t, and that means making sure we have > a context loaded for ctx-residing WAs). > > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
