On Fri, Jun 15, 2018 at 07:44:08PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2018-06-15 18:44:05) > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Validate that all display timings fit within the number of bits > > we have in the transcoder timing registers. > > > > The limits are: > > hsw+: > > 4k: vdisplay, vblank_start > > 8k: everything else > > gen3+: > > 4k: h/vdisplay, h/vblank_start > > 8k: everything else > > gen2: > > 2k: h/vdisplay, h/vblank_start > > 4k: everything else > > > > Also document the fact that the mode_config.max_width/height limits > > refer to just the max framebuffer dimensions we support. Which may > > be larger than the max hdisplay/vdisplay. > > In the ddx, I used them to filter max hdisplay/vdisplay... And > completely ignored them wrt to framebuffer. Whatever works :) -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
