Quoting Oscar Mateo Lozano (2018-06-15 17:01:37) > > > On 6/15/2018 1:59 AM, Chris Wilson wrote: > > For each platform, we have a few registers that rewritten with multiple > > values -- they are not part of a sequence, just different parts of a > > masked register set at different times (e.g. platform and gen > > workarounds). Consolidate these into a single register write to keep the > > table compact. > > > > While adjusting the construction of the wa table, make it non fatal so > > that the driver still loads but keeping the warning and extra details > > for inspection. > > A while ago I sent a patch > (https://patchwork.freedesktop.org/patch/205035/) that uses simple MMIO > writes to apply ctx workarounds. This is possible since we now have > proper golden contexts, and avoids the need for these patches. > It also has the advantage that an improperly classified WA doesn't get > lost (we still need the classification if we want to properly validate > the WAs, but that's a different story). > Are we sure we prefer to do this instead? Short attention span, I was caught up in trying to fix the overflow. So I think I want to keep the checker here that we aren't using conflicting workarounds, and keep the list ordered (because that helps us when reading and checking them). Care to respin? :) Meanwhile, gem_workarounds is still complaining that the write here to _3D_CHICKEN3 isn't sticking. It works locally, and I can't see anything to explain why it wouldn't for CI. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
