== Series Details == Series: Enable Dynamic cdclk and HDA together on GLK URL : https://patchwork.freedesktop.org/series/44713/ State : warning == Summary == $ dim checkpatch origin/drm-tip 08c10018dfc7 drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled -:54: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #54: FILE: drivers/gpu/drm/i915/i915_reg.h:8886: +#define POWER_WELL_2_REQUEST (1<<31) ^ -:76: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #76: FILE: drivers/gpu/drm/i915/intel_audio.c:716: +static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv, + bool enable) -:221: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (16, 25) #221: FILE: drivers/gpu/drm/i915/intel_cdclk.c:2401: if (IS_GEMINILAKE(dev_priv)) { + cdclk = glk_calc_cdclk(intel_state->cdclk.force_min_cdclk); total: 0 errors, 1 warnings, 2 checks, 229 lines checked b521f169b581 drm/i915: Introduce for_each_intel_dp() -:21: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #21: FILE: drivers/gpu/drm/i915/intel_display.h:288: +#define for_each_intel_dp(dev, intel_encoder) \ + for_each_intel_encoder(dev, intel_encoder) \ + for_each_if(intel_encoder_is_dp(intel_encoder)) -:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_encoder' - possible side-effects? #21: FILE: drivers/gpu/drm/i915/intel_display.h:288: +#define for_each_intel_dp(dev, intel_encoder) \ + for_each_intel_encoder(dev, intel_encoder) \ + for_each_if(intel_encoder_is_dp(intel_encoder)) total: 1 errors, 0 warnings, 1 checks, 86 lines checked 5e2850c0c5ad drm/i915: Lock gmbus/aux mutexes while changing cdclk 2fde8d7211a8 drm/i915: Shut off PW2 when changing cdclk on glk _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
