Quoting Chris Wilson (2018-06-08 13:55:47)
> @@ -570,42 +585,10 @@ static void reset_ring(struct intel_engine_cs *engine,
> * the restored context.
> */
> if (request) {
> - struct drm_i915_private *dev_priv = request->i915;
> - struct intel_context *ce = request->hw_context;
> - struct i915_hw_ppgtt *ppgtt;
> -
> - if (ce->state) {
> - I915_WRITE(CCID,
> - i915_ggtt_offset(ce->state) |
> - BIT(8) /* must be set! */ |
> - CCID_EXTENDED_STATE_SAVE |
> - CCID_EXTENDED_STATE_RESTORE |
> - CCID_EN);
> - }
> -
> - ppgtt = request->gem_context->ppgtt ?: engine->i915->mm.aliasing_ppgtt;
> - if (ppgtt) {
> - u32 pd_offset = ppgtt->pd.base.ggtt_offset << 10;
> -
> - I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
> - I915_WRITE(RING_PP_DIR_BASE(engine), pd_offset);
> -
> - /* Wait for the PD reload to complete */
> - if (intel_wait_for_register(dev_priv,
> - RING_PP_DIR_BASE(engine),
> - BIT(0), 0,
> - 10))
> - DRM_ERROR("Wait for reload of ppgtt page-directory timed out\n");
> -
> - ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine);
So I forgot about Sandybridge here. Snb doesn't place an LRI in each
request, and uses mmio instead. Hence has the problem of not setting
PP_DIR after reset until the next request is submitted.
-Chris
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