Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > glk is failing gem_tiled_blits which is very odd as it doesn't use > fencing and so the tiling is all internal to the GPU. From the small > number of examples seen so far, it looks like just a single bit is being > flipped. Let's dump some values to see if it there is a larger pattern > here. > > Furthermore since gem_linear_blits is also showing bitflips on glk, we > can rule out the impact of tiling altogether! It just becomes a question > of which piece of hw is broken... > > References: https://bugs.freedesktop.org/show_bug.cgi?id=106608 One bit flipping, weird. And I guess we only have one glk so can't crosscheck. > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> This will give more data out to see if there is a pattern, Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > tests/gem_linear_blits.c | 11 +++++++---- > tests/gem_tiled_blits.c | 14 ++++++++------ > 2 files changed, 15 insertions(+), 10 deletions(-) > > diff --git a/tests/gem_linear_blits.c b/tests/gem_linear_blits.c > index 7d05fa865..8a8d2a6cc 100644 > --- a/tests/gem_linear_blits.c > +++ b/tests/gem_linear_blits.c > @@ -141,16 +141,19 @@ create_bo(int fd, uint32_t val) > static void > check_bo(int fd, uint32_t handle, uint32_t val) > { > + int num_errors; > int i; > > gem_read(fd, handle, 0, linear, sizeof(linear)); > + > + num_errors = 0; > for (i = 0; i < WIDTH*HEIGHT; i++) { > - igt_assert_f(linear[i] == val, > - "Expected 0x%08x, found 0x%08x " > - "at offset 0x%08x\n", > - val, linear[i], i * 4); > + if (linear[i] != val && num_errors++ < 32) > + igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n", > + i * 4, val, linear[i], val ^ linear[i]); > val++; > } > + igt_assert_eq(num_errors, 0); > } > > static void run_test(int fd, int count) > diff --git a/tests/gem_tiled_blits.c b/tests/gem_tiled_blits.c > index 0d472e3a1..26cd900b7 100644 > --- a/tests/gem_tiled_blits.c > +++ b/tests/gem_tiled_blits.c > @@ -90,10 +90,11 @@ create_bo(uint32_t start_val) > } > > static void > -check_bo(drm_intel_bo *bo, uint32_t start_val) > +check_bo(drm_intel_bo *bo, uint32_t val) > { > drm_intel_bo *linear_bo; > uint32_t *linear; > + int num_errors; > int i; > > linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096); > @@ -103,13 +104,14 @@ check_bo(drm_intel_bo *bo, uint32_t start_val) > do_or_die(drm_intel_bo_map(linear_bo, 0)); > linear = linear_bo->virtual; > > + num_errors = 0; > for (i = 0; i < 1024 * 1024 / 4; i++) { > - igt_assert_f(linear[i] == start_val, > - "Expected 0x%08x, found 0x%08x " > - "at offset 0x%08x\n", > - start_val, linear[i], i * 4); > - start_val++; > + if (linear[i] != val && num_errors++ < 32) > + igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n", > + i * 4, val, linear[i], val ^ linear[i]); > + val++; > } > + igt_assert_eq(num_errors, 0); > drm_intel_bo_unmap(linear_bo); > > drm_intel_bo_unreference(linear_bo); > -- > 2.17.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
