On Fri, 25 May 2018, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Thu, May 24, 2018 at 10:19:02PM +0100, Chris Wilson wrote: >> Quoting Ville Syrjala (2018-05-24 20:04:05) >> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> >> > >> > My ILK seems to generate a spurious PCH underrun with most interlaced >> > HDMI modes. Add a second vblank wait to avoid it. >> >> Fwiw, a second vblank because of interlacing is very believable. /me .oO( could we wait for the 2nd vblank based on interlace? ) >> >> > We have seen some spurious PCH underruns still in CI as well, some >> > of which seem to be progressive DP. The logs also point towards some >> > spurious underrins with progressive HDMI on SNB. While I don't have >> > a solid explanation for those let's try to kill all the birds with one >> > stone and always do the double wait. >> > >> > Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106387 >> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> >> Acked-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>a > > Thanks. Pushed to dinq. > >> >> No point waiting for a vblank worker? ;) > > That might take a while. Also I'm not sure we'd want to use it here > because we'd probably want underrun reporting to be active by the > time we enable the planes. So we'd either have to enable planes from > the worker as well, or we'd just sample the vblank counter at the > end of crtc_enable and wait for n+2 just before we start to enable the > planes. Not sure if that latter approach would gain us any practical > parallelism though. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
