On Wed, May 23, 2018 at 12:42:43PM +0300, Jani Nikula wrote:
> On Fri, 18 May 2018, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Add the missing eDP port handling into assert_panel_unlocked(). We now
> > have intel_dp_port_enabled() which makes this trivial.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>
> Can we now change the initialization
>
> enum pipe panel_pipe = PIPE_A;
>
> to
>
> enum pipe panel_pipe = INVALID_PIPE;
>
> ?
Hmm. Yes, I believe we can.
>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++--
> > 1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index d397febb5a7f..a7702a72cd69 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1214,9 +1214,23 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
> > pp_reg = PP_CONTROL(0);
> > port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
> >
> > - if (port_sel == PANEL_PORT_SELECT_LVDS)
> > + switch (port_sel) {
> > + case PANEL_PORT_SELECT_LVDS:
> > intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
> > - /* XXX: else fix for eDP */
> > + break;
> > + case PANEL_PORT_SELECT_DPA:
> > + intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
> > + break;
> > + case PANEL_PORT_SELECT_DPC:
> > + intel_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
> > + break;
> > + case PANEL_PORT_SELECT_DPD:
> > + intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
> > + break;
> > + default:
> > + MISSING_CASE(port_sel);
> > + break;
> > + }
> > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> > /* presumably write lock depends on pipe, not port select */
> > pp_reg = PP_CONTROL(pipe);
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
