== Series Details == Series: series starting with [v3,1/7] drm/i915/psr: Nuke PSR support for VLV and CHV URL : https://patchwork.freedesktop.org/series/43368/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6e561e557b3d drm/i915/psr: Nuke PSR support for VLV and CHV 76eeb06056e8 drm/i915/dp: Use intel_dp_aux_wait_done() to wait for previous aux xfer 03733f0d0e8c drm/i915/psr: Remove intel_crtc_state parameter from disable() 704b28a727be drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink 3a64512fbe43 drm/i915/psr: Handle PSR RFB storage error 1e477b3f6103 drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side -:35: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #35: FILE: drivers/gpu/drm/i915/i915_reg.h:4023: +#define EDP_PSR_CRC_ENABLE (1<<10) /* BDW+ */ ^ total: 0 errors, 0 warnings, 1 checks, 66 lines checked b3fc76974022 drm/i915/psr: Avoid PSR exit max time timeout -:48: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #48: FILE: drivers/gpu/drm/i915/intel_psr.c:642: + I915_WRITE(EDP_PSR_DEBUG, + EDP_PSR_DEBUG_MASK_MEMUP | total: 0 errors, 0 warnings, 1 checks, 32 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
