✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/8] drm/i915: Remove tasklet flush before disable

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== Series Details ==

Series: series starting with [CI,1/8] drm/i915: Remove tasklet flush before disable
URL   : https://patchwork.freedesktop.org/series/43279/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
65dc7678895f drm/i915: Remove tasklet flush before disable
4ec12cf75d13 drm/i915: Only sync tasklets once for recursive reset preparation
1679c56ac90d drm/i915/execlists: Refactor out complete_preempt_context()
ea6e4205f335 drm/i915: Move engine reset prepare/finish to backends
0eeec4b1e771 drm/i915: Split execlists/guc reset preparations
144490575fd2 drm/i915/execlists: Split out CSB processing
-:67: WARNING:LONG_LINE: line over 100 characters
#67: FILE: drivers/gpu/drm/i915/intel_lrc.c:975:
+				(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

-:85: WARNING:LONG_LINE: line over 100 characters
#85: FILE: drivers/gpu/drm/i915/intel_lrc.c:989:
+			head = readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));

-:102: WARNING:LONG_LINE: line over 100 characters
#102: FILE: drivers/gpu/drm/i915/intel_lrc.c:1004:
+			  head, GEN8_CSB_READ_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?",

-:103: WARNING:LONG_LINE: line over 100 characters
#103: FILE: drivers/gpu/drm/i915/intel_lrc.c:1005:
+			  tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?");

total: 0 errors, 4 warnings, 0 checks, 144 lines checked
e42da871bcce drm/i915/execlists: Flush pending preemption events during reset
387525caae78 drm/i915: Stop parking the signaler around reset

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