Quoting Tvrtko Ursulin (2018-05-16 15:24:33) > > + /* > > + * The last active request can then be no later than the last request > > + * now in ELSP[0]. So search backwards from there, so that if the GPU > > + * has advanced beyond the last CSB update, it will be pardoned. > > + */ > > + active = NULL; > > + request = port_request(execlists->port); > > + if (request) { > > Assignment to request is for nothing it seems. > > > + unsigned long flags; > > + > > + spin_lock_irqsave(&engine->timeline.lock, flags); > > + list_for_each_entry_from_reverse(request, It's a 'from' list_for_each variant. > > + &engine->timeline.requests, > > + link) { > > + if (__i915_request_completed(request, > > + request->global_seqno)) > > + break; > > + > > + active = request; > > + } > > + spin_unlock_irqrestore(&engine->timeline.lock, flags); > > + } > > + > > + return active; > > } > > > > static void execlists_reset(struct intel_engine_cs *engine, > > > > No other complaints and I could be bribed to look past the request to > split it. :) Is not clearing the backlog so we can get onto features not enough incentive? Chocolate? Beer? Chocolate-flavoured beer? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx