✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable

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== Series Details ==

Series: series starting with [1/7] drm/i915: Remove tasklet flush before disable
URL   : https://patchwork.freedesktop.org/series/43235/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
823d4421c732 drm/i915: Remove tasklet flush before disable
97032fea8040 drm/i915: Only sync tasklets once for recursive reset preparation
7f52a34d6167 drm/i915/execlists: Refactor out complete_preempt_context()
4477eba97fad drm/i915: Move engine reset prepare/finish to backends
5ecbe1da729c drm/i915: Split execlists/guc reset preparations
0df011d60e46 drm/i915/execlists: Flush pending preemption events during reset
-:69: WARNING:LONG_LINE: line over 100 characters
#69: FILE: drivers/gpu/drm/i915/intel_lrc.c:975:
+				(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

-:87: WARNING:LONG_LINE: line over 100 characters
#87: FILE: drivers/gpu/drm/i915/intel_lrc.c:989:
+			head = readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));

-:104: WARNING:LONG_LINE: line over 100 characters
#104: FILE: drivers/gpu/drm/i915/intel_lrc.c:1004:
+			  head, GEN8_CSB_READ_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?",

-:105: WARNING:LONG_LINE: line over 100 characters
#105: FILE: drivers/gpu/drm/i915/intel_lrc.c:1005:
+			  tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?");

total: 0 errors, 4 warnings, 0 checks, 192 lines checked
664c90a51f2e drm/i915: Stop parking the signaler around reset

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