Quoting Chris Wilson (2018-05-11 13:11:47) > The original switch to use CSB from the HWSP was plagued by the effort > of read ordering on VT-d; we would read the WRITE pointer from the HWSP > before it had completed writing the CSB contents. The mystery comes down > to the lack of rmb() for correct ordering with respect to the writes > from HW, and with that resolved we can remove the VT-d special casing. Mika's been able to reproduce the VT-d issue and is soak testing this fix, so I'll leave that until he's had a chance to confirm it survives. In the meantime, I think we are reasonably happy this is the right fix for Cannonlake and beyond, so I've pushed the first two patches. Thanks for the review and testing, -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
