Re: [PATCH] drm/i915/oa: Disable OA on Haswell

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My understanding of the virtual memory addressing from the GPU is limited...
But how can the GPU poke at the kernel's allocated data?
I thought we mapped into the GPU's address space only what is allocated through gem.

-
Lionel

On 11/05/18 14:56, Chris Wilson wrote:
We observe that the OA architecture is clobbering random memory. Disable
it until this can be resolved.

References: https://bugs.freedesktop.org/show_bug.cgi?id=106379
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx>
Cc: Matthew Auld <matthew.auld@xxxxxxxxx>
Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
---
  drivers/gpu/drm/i915/i915_perf.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 019bd2d073ad..20187f3bf350 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3425,7 +3425,7 @@ static struct ctl_table dev_root[] = {
   */
  void i915_perf_init(struct drm_i915_private *dev_priv)
  {
-	if (IS_HASWELL(dev_priv)) {
+	if (IS_HASWELL(dev_priv) && 0) {
  		dev_priv->perf.oa.ops.is_valid_b_counter_reg =
  			gen7_is_valid_b_counter_addr;
  		dev_priv->perf.oa.ops.is_valid_mux_reg =


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