This can be used to monitor the number of powergating transition changes for a particular workload. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_lrc.c | 1 + drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++++++ 3 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 1bab0447c9dc..c795a674abf0 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -505,6 +505,7 @@ void intel_engine_setup_common(struct intel_engine_cs *engine) i915_timeline_init(engine->i915, &engine->timeline, engine->name); memset(&engine->last_sseu, 0, sizeof(engine->last_sseu)); + atomic_set(&engine->sseu_transitions, 0); intel_engine_init_execlist(engine); intel_engine_init_hangcheck(engine); @@ -1439,6 +1440,8 @@ void intel_engine_dump(struct intel_engine_cs *engine, hexdump(m, engine->status_page.page_addr, PAGE_SIZE); drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine))); + + drm_printf(m, "Powergating transitions: %u\n", atomic_read(&engine->sseu_transitions)); } static u8 user_class_map[] = { diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index c9a51185b7fe..d0c429c4bd35 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -542,6 +542,7 @@ static void maybe_enable_noa_reprogram(struct i915_request *rq) *cs++ = upper_32_bits(engine->noa_reprogram_vma->node.start); engine->last_sseu = rq->sseu; + atomic_inc(&engine->sseu_transitions); } static void port_assign(struct execlist_port *port, struct i915_request *rq) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 955518a5396f..80819172619e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -357,6 +357,12 @@ struct intel_engine_cs { */ union intel_sseu last_sseu; + /** + * @sseu_transitions: A counter of the number of powergating + * transition this engine has gone through. + */ + atomic_t sseu_transitions; + atomic_t irq_count; unsigned long irq_posted; #define ENGINE_IRQ_BREADCRUMB 0 -- 2.17.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx