On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote: > Only enough to achieve HuC authentication. No GuC submission > or any other feature for the time being. > > v2: Fix extra space > > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> > Cc: John Spotswood <john.a.spotswood@xxxxxxxxx> Reviewed-by: John Spotswood <john.a.spotswood@xxxxxxxxx> > Cc: Tony Ye <tony.ye@xxxxxxxxx> > Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_guc.c | 10 ++++++++-- > drivers/gpu/drm/i915/intel_guc_fwif.h | 1 + > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_guc.c > b/drivers/gpu/drm/i915/intel_guc.c > index 116f4cc..b1b69e1 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc > *guc) > > params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER; > > - params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER | > - GUC_CTL_VCS2_ENABLED; > + if (INTEL_GEN(dev_priv) >= 11) { > + params[GUC_CTL_FEATURE] |= > GEN11_GUC_CTL_DISABLE_SCHEDULER; > + } else { > + params[GUC_CTL_FEATURE] |= > GUC_CTL_DISABLE_SCHEDULER; > + params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED; > + } > > params[GUC_CTL_LOG_PARAMS] = guc->log.flags; > > @@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc) > u32 pgs = intel_guc_ggtt_offset(guc, guc- > >stage_desc_pool); > u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16; > > + GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11); > + > params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT; > params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED; > > diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h > b/drivers/gpu/drm/i915/intel_guc_fwif.h > index 0867ba7..781c0c0 100644 > --- a/drivers/gpu/drm/i915/intel_guc_fwif.h > +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h > @@ -106,6 +106,7 @@ > #define GUC_CTL_PREEMPTION_LOG (1 << 5) > #define GUC_CTL_ENABLE_SLPC (1 << 7) > #define GUC_CTL_RESET_ON_PREMPT_FAILURE (1 << 8) > +#define GEN11_GUC_CTL_DISABLE_SCHEDULER (1 << 14) > > #define GUC_CTL_DEBUG 8 > #define GUC_LOG_VERBOSITY_SHIFT 0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx