Hi all, Another update, trying to minimize the number of reprogramming issued due to powergating configuration changes. This is achieved by tracking the last submitted powergating configuration in the engine submission mechanism and reprogramming only on configuration changes. Another improvement that could be applied to limit the number of changes in the powergating configuration could be : - to align all contexts to a given configuration (implictly discard the userspace requests). - within the submission mechanism, have a round robin scheduling that switches between buckets of contexts of different powergating configuration This series doesn't include such mechanisms, it's probably best for me to leave that to people who are more experienced. Cheers, Chris Wilson (3): drm/i915: Program RPCS for Broadwell drm/i915: Record the sseu configuration per-context & engine drm/i915: Expose RPCS (SSEU) configuration to userspace Lionel Landwerlin (3): drm/i915/perf: simplify configure all context function drm/i915: reprogram NOA muxes on context switch when using perf drm/i915: count powergating transitions per engine drivers/gpu/drm/i915/i915_drv.h | 6 + drivers/gpu/drm/i915/i915_gem.h | 13 ++ drivers/gpu/drm/i915/i915_gem_context.c | 117 ++++++++++++++++- drivers/gpu/drm/i915/i915_gem_context.h | 3 + drivers/gpu/drm/i915/i915_perf.c | 119 ++++++++++++++++-- drivers/gpu/drm/i915/i915_request.h | 6 + drivers/gpu/drm/i915/intel_engine_cs.c | 2 + drivers/gpu/drm/i915/intel_gpu_commands.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 146 +++++++++++++++++++--- drivers/gpu/drm/i915/intel_lrc.h | 4 + drivers/gpu/drm/i915/intel_ringbuffer.c | 3 + drivers/gpu/drm/i915/intel_ringbuffer.h | 3 + include/uapi/drm/i915_drm.h | 38 ++++++ 13 files changed, 433 insertions(+), 28 deletions(-) -- 2.17.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx