Op 19-04-18 om 12:22 schreef Vidya Srinivas: > From: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > > We skip src trunction/adjustments for > NV12 case and handle the sizes directly. > Without this, pipe fifo underruns are seen on APL/KBL. > > v2: For NV12, making the src coordinates multiplier of 4 > > v3: Moving all the src coords handling code for NV12 > to skl_check_nv12_surface > > v4: Added RB from Mika > > Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Signed-off-by: Vidya Srinivas <vidya.srinivas@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 39 ++++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_sprite.c | 15 ++++++++++---- > 2 files changed, 50 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 3e1c26a..dcbc70d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3118,6 +3118,42 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state, > return 0; > } > > +static int > +skl_check_nv12_surface(const struct intel_crtc_state *crtc_state, > + struct intel_plane_state *plane_state) > +{ > + int crtc_x2 = plane_state->base.crtc_x + plane_state->base.crtc_w; > + int crtc_y2 = plane_state->base.crtc_y + plane_state->base.crtc_h; > + > + if (((plane_state->base.src_x >> 16) % 4) != 0 || > + ((plane_state->base.src_y >> 16) % 4) != 0 || > + ((plane_state->base.src_w >> 16) % 4) != 0 || > + ((plane_state->base.src_h >> 16) % 4) != 0) { > + DRM_DEBUG_KMS("src coords must be multiple of 4 for NV12\n"); > + return -EINVAL; > + } > + > + /* Clipping would cause a 1-3 pixel gap at the edge of the screen? */ > + if ((crtc_x2 > crtc_state->pipe_src_w && crtc_state->pipe_src_w % 4) || > + (crtc_y2 > crtc_state->pipe_src_h && crtc_state->pipe_src_h % 4)) { > + DRM_DEBUG_KMS("It's not possible to clip %u,%u to %u,%u\n", > + crtc_x2, crtc_y2, > + crtc_state->pipe_src_w, crtc_state->pipe_src_h); > + return -EINVAL; > + } > + > + plane_state->base.src.x1 = > + DIV_ROUND_CLOSEST(plane_state->base.src.x1, 1 << 18) << 18; > + plane_state->base.src.x2 = > + DIV_ROUND_CLOSEST(plane_state->base.src.x2, 1 << 18) << 18; > + plane_state->base.src.y1 = > + DIV_ROUND_CLOSEST(plane_state->base.src.y1, 1 << 18) << 18; > + plane_state->base.src.y2 = > + DIV_ROUND_CLOSEST(plane_state->base.src.y2, 1 << 18) << 18; > + > + return 0; > +} > + > static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) > { > const struct drm_framebuffer *fb = plane_state->base.fb; > @@ -3201,6 +3237,9 @@ int skl_check_plane_surface(const struct intel_crtc_state *crtc_state, > * the main surface setup depends on it. > */ > if (fb->format->format == DRM_FORMAT_NV12) { > + ret = skl_check_nv12_surface(crtc_state, plane_state); > + if (ret) > + return ret; > ret = skl_check_nv12_aux_surface(plane_state); > if (ret) > return ret; Can this series be rebased on top of drm-tip? The changes to check_sprite_plane are interfering with this now. Ideally in this order, for not breaking bisect: 1. [v5] drm/i915: Enable display workaround 827 for all planes, v2. <https://patchwork.freedesktop.org/patch/217887/> 2. [v5] drm/i915: Enable Display WA 0528 <https://patchwork.freedesktop.org/patch/217889/> 3. [v5] drm/i915: Add skl_check_nv12_surface for NV12 <https://patchwork.freedesktop.org/patch/217888/> 4. [v5] drm/i915: Add NV12 support to intel_framebuffer_init <https://patchwork.freedesktop.org/patch/217886/> 5. [v5] drm/i915: Add NV12 as supported format for primary plane <https://patchwork.freedesktop.org/patch/217884/> 6. [v5] drm/i915: Add NV12 as supported format for sprite plane <https://patchwork.freedesktop.org/patch/217885/> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx