On Thu, Apr 26, 2018 at 06:50:05PM +0300, Ville Syrjälä wrote: > On Thu, Apr 26, 2018 at 08:42:54AM -0700, Lucas De Marchi wrote: > > On Thu, Apr 26, 2018 at 06:27:26PM +0300, Ville Syrjälä wrote: > > > On Thu, Apr 26, 2018 at 08:22:12AM -0700, Lucas De Marchi wrote: > > > > On Thu, Apr 26, 2018 at 04:43:38PM +0300, Ville Syrjälä wrote: > > > > > On Wed, Apr 25, 2018 at 02:55:24PM -0700, Lucas De Marchi wrote: > > > > > > This became dead code with commit 309bd8ed464f ("drm/i915: Reinstate > > > > > > GMBUS and AUX interrupts on gen4/g4x"). > > > > > > > > > > > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > > > > > > --- > > > > > > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > > > > > > drivers/gpu/drm/i915/intel_dp.c | 22 +++++++--------------- > > > > > > drivers/gpu/drm/i915/intel_drv.h | 1 - > > > > > > drivers/gpu/drm/i915/intel_psr.c | 2 +- > > > > > > 4 files changed, 9 insertions(+), 19 deletions(-) > > > > > > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > > > > > index 8444ca8d5aa3..09e1c2289ea1 100644 > > > > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > > > > @@ -2545,7 +2545,7 @@ intel_info(const struct drm_i915_private *dev_priv) > > > > > > IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv)) > > > > > > > > > > > > /* > > > > > > - * dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts > > > > > > + * gmbus irq on gen4 seems to be able to generate legacy interrupts > > > > > > > > > > Why are you removing vital information from the comment? > > > > > > > > Because it wouldn't match the code anymore. We always use aux irq. > > > > > > The comment is documenting the hardware behaviour. We don't want to lose > > > that information. > > > > IMO it's confusing to have the comment saying one thing and then code > > not following it. Reading it again I see the second paragraph you added > > actually document the code and the first the HW behavior. Maybe starting > > the second paragraph with a "However" would make it clearer. Or I can just > > drop this change in the comment. > > Or you can move the relevant parts of the comment to the place where > we do the "MSI or not to MSI" decision. Humn, not sure I fully understand what you mean by relevant part. Do you mean something like this? diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b7dbeba72dec..3fc6b915dac1 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1183,6 +1183,9 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) * get lost on g4x as well, and interrupt delivery seems to stay * properly dead afterwards. So we'll just disable them for all * pre-gen5 chipsets. + * + * Since we don't enable MSI on gen <= 4 we can always use GMBUS/AUX + * interrupts. */ if (INTEL_GEN(dev_priv) >= 5) { if (pci_enable_msi(pdev) < 0) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 09e1c2289ea1..5fd47227da23 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2545,13 +2545,10 @@ intel_info(const struct drm_i915_private *dev_priv) IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv)) /* - * gmbus irq on gen4 seems to be able to generate legacy interrupts + * dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts * even when in MSI mode. This results in spurious interrupt warnings if the * legacy irq no. is shared with another device. The kernel then disables that * interrupt source and so prevents the other device from working properly. - * - * Since we don't enable MSI anymore on gen4, we can always use GMBUS/AUX - * interrupts. */ #define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4) ------- It doesn't seem clearer to me. Lucas De Marchi > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx