Let's see if we have all the kinks worked out and full-ppgtt now works
reliably on Haswell. If we can let userspace have full control over
their own ppgtt, it makes softpinning far more effective, in turn making
GPU dispatch far more efficient and more secure (due to better mm
segregation).
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b454f3489767..eef37ce184eb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -178,7 +178,7 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
return 0;
}
- if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
+ if (HAS_LOGICAL_RING_CONTEXTS(dev_priv) || IS_HASWELL(dev_priv)) {
if (has_full_48bit_ppgtt)
return 3;
--
2.17.0
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