Hi Chandra, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.17-rc1 next-20180420] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Vidya-Srinivas/drm-i915-Add-NV12-support-to-intel_framebuffer_init/20180420-184309 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-x014-201815 (attached as .config) compiler: gcc-7 (Debian 7.3.0-16) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/gpu/drm/i915/intel_display.c: In function 'intel_framebuffer_init': >> drivers/gpu/drm/i915/intel_display.c:14142:19: error: 'SKL_MIN_YUV_420_SRC_W' undeclared (first use in this function); did you mean 'SKL_MIN_SRC_W'? (fb->width < SKL_MIN_YUV_420_SRC_W || ^~~~~~~~~~~~~~~~~~~~~ SKL_MIN_SRC_W drivers/gpu/drm/i915/intel_display.c:14142:19: note: each undeclared identifier is reported only once for each function it appears in >> drivers/gpu/drm/i915/intel_display.c:14143:20: error: 'SKL_MIN_YUV_420_SRC_H' undeclared (first use in this function); did you mean 'SKL_MIN_YUV_420_SRC_W'? fb->height < SKL_MIN_YUV_420_SRC_H || ^~~~~~~~~~~~~~~~~~~~~ SKL_MIN_YUV_420_SRC_W make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1 make[4]: Target '__build' not remade because of errors. vim +14142 drivers/gpu/drm/i915/intel_display.c 13968 13969 static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, 13970 struct drm_i915_gem_object *obj, 13971 struct drm_mode_fb_cmd2 *mode_cmd) 13972 { 13973 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); 13974 struct drm_framebuffer *fb = &intel_fb->base; 13975 struct drm_format_name_buf format_name; 13976 u32 pitch_limit; 13977 unsigned int tiling, stride; 13978 int ret = -EINVAL; 13979 int i; 13980 13981 i915_gem_object_lock(obj); 13982 obj->framebuffer_references++; 13983 tiling = i915_gem_object_get_tiling(obj); 13984 stride = i915_gem_object_get_stride(obj); 13985 i915_gem_object_unlock(obj); 13986 13987 if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) { 13988 /* 13989 * If there's a fence, enforce that 13990 * the fb modifier and tiling mode match. 13991 */ 13992 if (tiling != I915_TILING_NONE && 13993 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { 13994 DRM_DEBUG_KMS("tiling_mode doesn't match fb modifier\n"); 13995 goto err; 13996 } 13997 } else { 13998 if (tiling == I915_TILING_X) { 13999 mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; 14000 } else if (tiling == I915_TILING_Y) { 14001 DRM_DEBUG_KMS("No Y tiling for legacy addfb\n"); 14002 goto err; 14003 } 14004 } 14005 14006 /* Passed in modifier sanity checking. */ 14007 switch (mode_cmd->modifier[0]) { 14008 case I915_FORMAT_MOD_Y_TILED_CCS: 14009 case I915_FORMAT_MOD_Yf_TILED_CCS: 14010 switch (mode_cmd->pixel_format) { 14011 case DRM_FORMAT_XBGR8888: 14012 case DRM_FORMAT_ABGR8888: 14013 case DRM_FORMAT_XRGB8888: 14014 case DRM_FORMAT_ARGB8888: 14015 break; 14016 default: 14017 DRM_DEBUG_KMS("RC supported only with RGB8888 formats\n"); 14018 goto err; 14019 } 14020 /* fall through */ 14021 case I915_FORMAT_MOD_Y_TILED: 14022 case I915_FORMAT_MOD_Yf_TILED: 14023 if (INTEL_GEN(dev_priv) < 9) { 14024 DRM_DEBUG_KMS("Unsupported tiling 0x%llx!\n", 14025 mode_cmd->modifier[0]); 14026 goto err; 14027 } 14028 case DRM_FORMAT_MOD_LINEAR: 14029 case I915_FORMAT_MOD_X_TILED: 14030 break; 14031 default: 14032 DRM_DEBUG_KMS("Unsupported fb modifier 0x%llx!\n", 14033 mode_cmd->modifier[0]); 14034 goto err; 14035 } 14036 14037 /* 14038 * gen2/3 display engine uses the fence if present, 14039 * so the tiling mode must match the fb modifier exactly. 14040 */ 14041 if (INTEL_GEN(dev_priv) < 4 && 14042 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { 14043 DRM_DEBUG_KMS("tiling_mode must match fb modifier exactly on gen2/3\n"); 14044 goto err; 14045 } 14046 14047 pitch_limit = intel_fb_pitch_limit(dev_priv, mode_cmd->modifier[0], 14048 mode_cmd->pixel_format); 14049 if (mode_cmd->pitches[0] > pitch_limit) { 14050 DRM_DEBUG_KMS("%s pitch (%u) must be at most %d\n", 14051 mode_cmd->modifier[0] != DRM_FORMAT_MOD_LINEAR ? 14052 "tiled" : "linear", 14053 mode_cmd->pitches[0], pitch_limit); 14054 goto err; 14055 } 14056 14057 /* 14058 * If there's a fence, enforce that 14059 * the fb pitch and fence stride match. 14060 */ 14061 if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { 14062 DRM_DEBUG_KMS("pitch (%d) must match tiling stride (%d)\n", 14063 mode_cmd->pitches[0], stride); 14064 goto err; 14065 } 14066 14067 /* Reject formats not supported by any plane early. */ 14068 switch (mode_cmd->pixel_format) { 14069 case DRM_FORMAT_C8: 14070 case DRM_FORMAT_RGB565: 14071 case DRM_FORMAT_XRGB8888: 14072 case DRM_FORMAT_ARGB8888: 14073 break; 14074 case DRM_FORMAT_XRGB1555: 14075 if (INTEL_GEN(dev_priv) > 3) { 14076 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14077 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14078 goto err; 14079 } 14080 break; 14081 case DRM_FORMAT_ABGR8888: 14082 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && 14083 INTEL_GEN(dev_priv) < 9) { 14084 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14085 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14086 goto err; 14087 } 14088 break; 14089 case DRM_FORMAT_XBGR8888: 14090 case DRM_FORMAT_XRGB2101010: 14091 case DRM_FORMAT_XBGR2101010: 14092 if (INTEL_GEN(dev_priv) < 4) { 14093 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14094 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14095 goto err; 14096 } 14097 break; 14098 case DRM_FORMAT_ABGR2101010: 14099 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { 14100 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14101 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14102 goto err; 14103 } 14104 break; 14105 case DRM_FORMAT_YUYV: 14106 case DRM_FORMAT_UYVY: 14107 case DRM_FORMAT_YVYU: 14108 case DRM_FORMAT_VYUY: 14109 if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) { 14110 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14111 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14112 goto err; 14113 } 14114 break; 14115 case DRM_FORMAT_NV12: 14116 if (mode_cmd->modifier[0] == I915_FORMAT_MOD_Y_TILED_CCS || 14117 mode_cmd->modifier[0] == I915_FORMAT_MOD_Yf_TILED_CCS) { 14118 DRM_DEBUG_KMS("RC not to be enabled with NV12\n"); 14119 goto err; 14120 } 14121 if (INTEL_GEN(dev_priv) < 9 || IS_SKYLAKE(dev_priv) || 14122 IS_BROXTON(dev_priv)) { 14123 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14124 drm_get_format_name(mode_cmd->pixel_format, 14125 &format_name)); 14126 goto err; 14127 } 14128 break; 14129 default: 14130 DRM_DEBUG_KMS("unsupported pixel format: %s\n", 14131 drm_get_format_name(mode_cmd->pixel_format, &format_name)); 14132 goto err; 14133 } 14134 14135 /* FIXME need to adjust LINOFF/TILEOFF accordingly. */ 14136 if (mode_cmd->offsets[0] != 0) 14137 goto err; 14138 14139 drm_helper_mode_fill_fb_struct(&dev_priv->drm, fb, mode_cmd); 14140 14141 if (fb->format->format == DRM_FORMAT_NV12 && 14142 (fb->width < SKL_MIN_YUV_420_SRC_W || 14143 fb->height < SKL_MIN_YUV_420_SRC_H || 14144 (fb->width % 4) != 0 || (fb->height % 4) != 0)) { 14145 DRM_DEBUG_KMS("src dimensions not correct for NV12\n"); 14146 return -EINVAL; 14147 } 14148 14149 for (i = 0; i < fb->format->num_planes; i++) { 14150 u32 stride_alignment; 14151 14152 if (mode_cmd->handles[i] != mode_cmd->handles[0]) { 14153 DRM_DEBUG_KMS("bad plane %d handle\n", i); 14154 goto err; 14155 } 14156 14157 stride_alignment = intel_fb_stride_alignment(fb, i); 14158 14159 /* 14160 * Display WA #0531: skl,bxt,kbl,glk 14161 * 14162 * Render decompression and plane width > 3840 14163 * combined with horizontal panning requires the 14164 * plane stride to be a multiple of 4. We'll just 14165 * require the entire fb to accommodate that to avoid 14166 * potential runtime errors at plane configuration time. 14167 */ 14168 if (IS_GEN9(dev_priv) && i == 0 && fb->width > 3840 && 14169 (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || 14170 fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) 14171 stride_alignment *= 4; 14172 14173 if (fb->pitches[i] & (stride_alignment - 1)) { 14174 DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n", 14175 i, fb->pitches[i], stride_alignment); 14176 goto err; 14177 } 14178 } 14179 14180 intel_fb->obj = obj; 14181 14182 ret = intel_fill_fb_info(dev_priv, fb); 14183 if (ret) 14184 goto err; 14185 14186 ret = drm_framebuffer_init(&dev_priv->drm, fb, &intel_fb_funcs); 14187 if (ret) { 14188 DRM_ERROR("framebuffer init failed %d\n", ret); 14189 goto err; 14190 } 14191 14192 return 0; 14193 14194 err: 14195 i915_gem_object_lock(obj); 14196 obj->framebuffer_references--; 14197 i915_gem_object_unlock(obj); 14198 return ret; 14199 } 14200 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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