Quoting Sagar Arun Kamble (2018-03-16 13:03:03) > > > On 3/16/2018 2:22 PM, Sagar Arun Kamble wrote: > > > > > > On 3/14/2018 3:07 PM, Chris Wilson wrote: > >> Allow ourselves to individually toggle rps or rc6. This will be used > >> later when we want to enable rps/rc6 at different phases during the > >> device bring up. > >> > >> Whilst here, convert the intel_$verb_gt_powersave over to > >> intel_gt_pm_$verb scheme. > >> > >> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > <snip> > >> +void intel_gt_pm_init(struct drm_i915_private *dev_priv) > >> { > >> struct intel_rps *rps = &dev_priv->gt_pm.rps; > >> @@ -2475,22 +2477,13 @@ void intel_init_gt_powersave(struct > >> drm_i915_private *dev_priv) > >> /* Finally allow us to boost to max by default */ > >> rps->boost_freq = rps->max_freq; > >> - mutex_unlock(&rps->lock); > >> -} > >> - > >> -static inline void intel_enable_llc_pstate(struct drm_i915_private > >> *i915) > >> -{ > >> - lockdep_assert_held(&i915->gt_pm.rps.lock); > >> - > >> - if (i915->gt_pm.llc_pstate.enabled) > >> - return; > >> - > >> - gen6_update_ring_freq(i915); > >> + if (HAS_LLC(dev_priv)) > >> + gen6_update_ring_freq(dev_priv); > > Ring frequency table update has to be done on resuming from sleep or > > reset as well hence we will > not required on resume from reset :) Good. Then it should be covered by the code that enables the powersaving on init/resume; and we are good to remove the gunk from reset. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx