Re: [PATCH 7/8] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI

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Hi Manasi,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20180329]
[cannot apply to v4.16-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Paulo-Zanoni/ICL-PLLs-DP-HDMI-and-misc-display-v2/20180330-131619
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-h0-03311214 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

                    ^
   In file included from include/linux/list.h:9:0,
                    from include/linux/kobject.h:19,
                    from include/linux/device.h:16,
                    from include/linux/i2c.h:30,
                    from include/drm/drm_scdc_helper.h:27,
                    from drivers/gpu//drm/i915/intel_ddi.c:28:
   drivers/gpu//drm/i915/intel_ddi.c:784:28: error: 'icl_combo_phy_ddi_translations_dp_hdmi_1_05V' undeclared (first use in this function)
       *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hdmi_1_05V);
                               ^
   include/linux/kernel.h:71:33: note: in definition of macro 'ARRAY_SIZE'
    #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
                                    ^
   In file included from include/linux/kernel.h:15:0,
                    from include/linux/list.h:9,
                    from include/linux/kobject.h:19,
                    from include/linux/device.h:16,
                    from include/linux/i2c.h:30,
                    from include/drm/drm_scdc_helper.h:27,
                    from drivers/gpu//drm/i915/intel_ddi.c:28:
   include/linux/build_bug.h:29:45: error: bit-field '<anonymous>' width not an integer constant
    #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
                                                ^
   include/linux/compiler-gcc.h:65:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
    #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
                               ^
   include/linux/kernel.h:71:59: note: in expansion of macro '__must_be_array'
    #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
                                                              ^
   drivers/gpu//drm/i915/intel_ddi.c:784:17: note: in expansion of macro 'ARRAY_SIZE'
       *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hdmi_1_05V);
                    ^
   drivers/gpu//drm/i915/intel_ddi.c: In function 'icl_pll_to_ddi_pll_sel':
   drivers/gpu//drm/i915/intel_ddi.c:939:35: error: 'const struct intel_shared_dpll' has no member named 'info'
     const enum intel_dpll_id id = pll->info->id;
                                      ^
   drivers/gpu//drm/i915/intel_ddi.c: In function 'icl_ddi_combo_vswing_program':
   drivers/gpu//drm/i915/intel_ddi.c:2142:2: error: implicit declaration of function 'ICL_PORT_TX_DW5_LN0' [-Werror=implicit-function-declaration]
     val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2142:8: note: in expansion of macro 'I915_READ'
     val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
           ^
   drivers/gpu//drm/i915/intel_ddi.c:2142:2: note: expected 'i915_reg_t' but argument is of type 'int'
     val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2145:2: error: implicit declaration of function 'ICL_PORT_TX_DW5_GRP' [-Werror=implicit-function-declaration]
     I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
    #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2145:2: note: in expansion of macro 'I915_WRITE'
     I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2145:2: note: expected 'i915_reg_t' but argument is of type 'int'
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2148:8: note: in expansion of macro 'I915_READ'
     val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
           ^
   drivers/gpu//drm/i915/intel_ddi.c:2148:2: note: expected 'i915_reg_t' but argument is of type 'int'
     val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2153:10: error: 'TAP2_DISABLE' undeclared (first use in this function)
      val |= TAP2_DISABLE;
             ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
    #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2159:2: note: in expansion of macro 'I915_WRITE'
     I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2159:2: note: expected 'i915_reg_t' but argument is of type 'int'
   drivers/gpu//drm/i915/intel_ddi.c:2162:2: error: implicit declaration of function 'ICL_PORT_TX_DW2_LN0' [-Werror=implicit-function-declaration]
     val = I915_READ(ICL_PORT_TX_DW2_LN0(port));
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2162:8: note: in expansion of macro 'I915_READ'
     val = I915_READ(ICL_PORT_TX_DW2_LN0(port));
           ^
   drivers/gpu//drm/i915/intel_ddi.c:2162:2: note: expected 'i915_reg_t' but argument is of type 'int'
     val = I915_READ(ICL_PORT_TX_DW2_LN0(port));
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2165:2: error: invalid use of undefined type 'struct icl_combo_phy_ddi_buf_trans'
     val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_select);
     ^
   In file included from drivers/gpu//drm/i915/i915_drv.h:56:0,
                    from drivers/gpu//drm/i915/intel_ddi.c:29:
>> drivers/gpu//drm/i915/intel_ddi.c:2165:41: error: dereferencing pointer to incomplete type
     val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_select);
                                            ^
   drivers/gpu//drm/i915/i915_reg.h:1991:33: note: in definition of macro 'SWING_SEL_UPPER'
    #define   SWING_SEL_UPPER(x)  ((x >> 3) << 15)
                                    ^
   drivers/gpu//drm/i915/intel_ddi.c:2166:2: error: invalid use of undefined type 'struct icl_combo_phy_ddi_buf_trans'
     val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_select);
     ^
   In file included from drivers/gpu//drm/i915/i915_drv.h:56:0,
                    from drivers/gpu//drm/i915/intel_ddi.c:29:
   drivers/gpu//drm/i915/intel_ddi.c:2166:41: error: dereferencing pointer to incomplete type
     val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_select);
                                            ^
   drivers/gpu//drm/i915/i915_reg.h:1993:33: note: in definition of macro 'SWING_SEL_LOWER'
    #define   SWING_SEL_LOWER(x)  ((x & 0x7) << 11)
                                    ^
   drivers/gpu//drm/i915/intel_ddi.c:2168:2: error: invalid use of undefined type 'struct icl_combo_phy_ddi_buf_trans'
     val |= RCOMP_SCALAR(ddi_translations[level].dw2_swing_scalar);
     ^
   In file included from drivers/gpu//drm/i915/i915_drv.h:56:0,
                    from drivers/gpu//drm/i915/intel_ddi.c:29:
   drivers/gpu//drm/i915/intel_ddi.c:2168:38: error: dereferencing pointer to incomplete type
     val |= RCOMP_SCALAR(ddi_translations[level].dw2_swing_scalar);
                                         ^
   drivers/gpu//drm/i915/i915_reg.h:1995:30: note: in definition of macro 'RCOMP_SCALAR'
    #define   RCOMP_SCALAR(x)  ((x) << 0)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2169:2: error: implicit declaration of function 'ICL_PORT_TX_DW2_GRP' [-Werror=implicit-function-declaration]
     I915_WRITE(ICL_PORT_TX_DW2_GRP(port), val);
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
    #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2169:2: note: in expansion of macro 'I915_WRITE'
     I915_WRITE(ICL_PORT_TX_DW2_GRP(port), val);
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2169:2: note: expected 'i915_reg_t' but argument is of type 'int'
   drivers/gpu//drm/i915/intel_ddi.c:2174:3: error: implicit declaration of function 'ICL_PORT_TX_DW4_LN' [-Werror=implicit-function-declaration]
      val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
      ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2174:9: note: in expansion of macro 'I915_READ'
      val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
            ^
   drivers/gpu//drm/i915/intel_ddi.c:2174:3: note: expected 'i915_reg_t' but argument is of type 'int'
      val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
      ^
   drivers/gpu//drm/i915/intel_ddi.c:2177:3: error: invalid use of undefined type 'struct icl_combo_phy_ddi_buf_trans'
      val |= ddi_translations[level].dw4_scaling;
      ^
   drivers/gpu//drm/i915/intel_ddi.c:2177:26: error: dereferencing pointer to incomplete type
      val |= ddi_translations[level].dw4_scaling;
                             ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
    #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2178:3: note: in expansion of macro 'I915_WRITE'
      I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);
      ^
   drivers/gpu//drm/i915/intel_ddi.c:2178:3: note: expected 'i915_reg_t' but argument is of type 'int'
   drivers/gpu//drm/i915/intel_ddi.c: In function 'icl_combo_phy_ddi_vswing_sequence':
   drivers/gpu//drm/i915/intel_ddi.c:2208:2: error: implicit declaration of function 'ICL_PORT_PCS_DW1_LN0' [-Werror=implicit-function-declaration]
     val = I915_READ(ICL_PORT_PCS_DW1_LN0(port));
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2208:8: note: in expansion of macro 'I915_READ'
     val = I915_READ(ICL_PORT_PCS_DW1_LN0(port));
           ^
   drivers/gpu//drm/i915/intel_ddi.c:2208:2: note: expected 'i915_reg_t' but argument is of type 'int'
     val = I915_READ(ICL_PORT_PCS_DW1_LN0(port));
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2213:2: error: implicit declaration of function 'ICL_PORT_PCS_DW1_GRP' [-Werror=implicit-function-declaration]
     I915_WRITE(ICL_PORT_PCS_DW1_GRP(port), val);
     ^
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
    #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
                                 ^
   drivers/gpu//drm/i915/intel_ddi.c:2213:2: note: in expansion of macro 'I915_WRITE'
     I915_WRITE(ICL_PORT_PCS_DW1_GRP(port), val);
     ^
   drivers/gpu//drm/i915/intel_ddi.c:2213:2: note: expected 'i915_reg_t' but argument is of type 'int'
   In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0:
   drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
    #define I915_READ(reg)  dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
                            ^
   drivers/gpu//drm/i915/intel_ddi.c:2223:9: note: in expansion of macro 'I915_READ'
      val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
            ^
   drivers/gpu//drm/i915/intel_ddi.c:2223:3: note: expected 'i915_reg_t' but argument is of type 'int'
      val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
      ^

vim +2165 drivers/gpu//drm/i915/intel_ddi.c

  2123	
  2124	static void icl_ddi_combo_vswing_program(struct drm_i915_private *dev_priv,
  2125						 u32 level, enum port port, int type)
  2126	{
  2127		const struct icl_combo_phy_ddi_buf_trans *ddi_translations = NULL;
  2128		u32 n_entries, val;
  2129		int ln;
  2130	
  2131		ddi_translations = icl_get_combo_buf_trans(dev_priv, port, type,
  2132							   &n_entries);
  2133		if (!ddi_translations)
  2134			return;
  2135	
  2136		if (level >= n_entries) {
  2137			DRM_DEBUG_KMS("DDI translation not found for level %d. Using %d instead.", level, n_entries - 1);
  2138			level = n_entries - 1;
  2139		}
  2140	
  2141		/* Set PORT_TX_DW5 Scaling Mode Sel to 110b. */
  2142		val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
  2143		val &= ~RTERM_SELECT_MASK;
  2144		val |= RTERM_SELECT(0x6);
  2145		I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
  2146	
  2147		/* Program PORT_TX_DW5 */
  2148		val = I915_READ(ICL_PORT_TX_DW5_LN0(port));
  2149		/* Set DisableTap2 and DisableTap3 if MIPI DSI
  2150		 * Clear DisableTap2 and DisableTap3 for all other Ports
  2151		 */
  2152		if (type == INTEL_OUTPUT_DSI) {
  2153			val |= TAP2_DISABLE;
  2154			val |= TAP3_DISABLE;
  2155		} else {
  2156			val &= ~TAP2_DISABLE;
  2157			val &= ~TAP3_DISABLE;
  2158		}
  2159		I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
  2160	
  2161		/* Program PORT_TX_DW2 */
> 2162		val = I915_READ(ICL_PORT_TX_DW2_LN0(port));
  2163		val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK |
  2164			 RCOMP_SCALAR_MASK);
> 2165		val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_select);
  2166		val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_select);
  2167		/* Program Rcomp scalar for every table entry */
  2168		val |= RCOMP_SCALAR(ddi_translations[level].dw2_swing_scalar);
  2169		I915_WRITE(ICL_PORT_TX_DW2_GRP(port), val);
  2170	
  2171		/* Program PORT_TX_DW4 */
  2172		/* We cannot write to GRP. It would overwrite individual loadgen. */
  2173		for (ln = 0; ln <= 3; ln++) {
  2174			val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));
  2175			val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK |
  2176				 CURSOR_COEFF_MASK);
  2177			val |= ddi_translations[level].dw4_scaling;
  2178			I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);
  2179		}
  2180	}
  2181	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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