== Series Details == Series: series starting with [01/11] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function URL : https://patchwork.freedesktop.org/series/40978/ State : warning == Summary == $ dim checkpatch origin/drm-tip 499cc3f929a4 drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function 5f0bc3f1c19d drm/i915/psr: Move PSR exit specific code to hardware specific function 00837d74661e drm/i915/psr: Share code between disable and exit 384712a1fb4a drm/i915/psr: Remove intel_crtc_state parameter from disable() af1fc4a61d32 drm/i915/psr: Export intel_psr_activate/exit() -:177: CHECK:BRACES: braces {} should be used on all arms of this statement #177: FILE: drivers/gpu/drm/i915/intel_psr.c:1182: + if (schedule) { [...] + } else [...] -:181: CHECK:BRACES: Unbalanced braces around else statement #181: FILE: drivers/gpu/drm/i915/intel_psr.c:1186: + } else total: 0 errors, 0 warnings, 2 checks, 153 lines checked 6d6bc90eccc3 drm/i915/psr: Add intel_psr_activate_block_get()/put() -:88: CHECK:LINE_SPACING: Please don't use multiple blank lines #88: FILE: drivers/gpu/drm/i915/intel_psr.c:1219: + + total: 0 errors, 0 warnings, 1 checks, 78 lines checked f42690dc389a drm/i915/dp: Exit PSR before do a aux channel transaction ac18ae2ade2c drm/i915: Keep IGT PSR and frontbuffer tests functional 191d9682d215 drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink 164ed46e42e1 drm/i915/psr: Handle PSR RFB storage error 67745738f4d0 drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side -:29: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #29: FILE: drivers/gpu/drm/i915/i915_reg.h:4004: +#define EDP_PSR_CRC_ENABLE (1<<10) /* BDW+ */ ^ total: 0 errors, 0 warnings, 1 checks, 38 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
