== Series Details == Series: series starting with [01/18] drm/i915/selftests: Avoid repeatedly harming the same innocent context URL : https://patchwork.freedesktop.org/series/40961/ State : warning == Summary == $ dim checkpatch origin/drm-tip 33a1831a25b2 drm/i915/selftests: Avoid repeatedly harming the same innocent context 17fe6b08c0bf drm/i915/execlists: Track begin/end of execlists submission sequences becb341ba47d drm/i915/execlists: Set queue priority from secondary port -:25: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #25: References: f6322eddaff7 ("drm/i915/preemption: Allow preemption between submission ports") -:25: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit f6322eddaff7 ("drm/i915/preemption: Allow preemption between submission ports")' #25: References: f6322eddaff7 ("drm/i915/preemption: Allow preemption between submission ports") total: 1 errors, 1 warnings, 0 checks, 9 lines checked 13502d2881e0 drm/i915/execlists: Refactor out complete_preempt_context() 271227fad5d5 drm/i915: Move engine reset prepare/finish to backends 335269c0d938 drm/i915: Split execlists/guc reset prepartions fc3bcbc4574d drm/i915/execlists: Flush pending preemption events during reset -:69: WARNING:LONG_LINE: line over 100 characters #69: FILE: drivers/gpu/drm/i915/intel_lrc.c:907: + (i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0))); -:87: WARNING:LONG_LINE: line over 100 characters #87: FILE: drivers/gpu/drm/i915/intel_lrc.c:921: + head = readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine))); -:104: WARNING:LONG_LINE: line over 100 characters #104: FILE: drivers/gpu/drm/i915/intel_lrc.c:935: + head, GEN8_CSB_READ_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?", -:105: WARNING:LONG_LINE: line over 100 characters #105: FILE: drivers/gpu/drm/i915/intel_lrc.c:936: + tail, GEN8_CSB_WRITE_PTR(readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)))), fw ? "" : "?"); total: 0 errors, 4 warnings, 0 checks, 192 lines checked 5cf71d272c49 drm/i915/selftests: Add basic sanitychecks for execlists -:43: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #43: new file mode 100644 -:254: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'W' - possible side-effects? #254: FILE: drivers/gpu/drm/i915/selftests/intel_lrc.c:207: +#define wedge_on_timeout(W, DEV, TIMEOUT) \ + for (__init_wedge((W), (DEV), (TIMEOUT), __builtin_return_address(0)); \ + (W)->i915; \ + __fini_wedge((W))) total: 0 errors, 1 warnings, 1 checks, 518 lines checked 5cc163689f97 drm/i915/breadcrumbs: Keep the fake irq armed across reset 520b029fa706 drm/i915: Combine tasklet_kill and tasklet_disable -:39: WARNING:MEMORY_BARRIER: memory barrier without comment #39: FILE: drivers/gpu/drm/i915/intel_lrc.c:1755: + smp_mb(); total: 0 errors, 1 warnings, 0 checks, 26 lines checked f719516f05ff drm/i915: Stop parking the signaler around reset 33aa7c8491c9 drm/i915: Be irqsafe inside reset 6ddb32ce734e drm/i915: Allow init_breadcrumbs to be used from irq context 7f3c5b702350 drm/i915/execlists: Force preemption via reset on timeout -:228: ERROR:SPACING: spaces required around that '=' (ctx:VxW) #228: FILE: drivers/gpu/drm/i915/selftests/intel_lrc.c:515: + ctx= kernel_context(i915); ^ total: 1 errors, 0 warnings, 0 checks, 241 lines checked 9003b1d0a64a drm/i915/execlists: Try preempt-reset from softirq context -:115: ERROR:SPACING: spaces required around that '=' (ctx:VxW) #115: FILE: drivers/gpu/drm/i915/selftests/intel_lrc.c:600: + ctx= kernel_context(i915); ^ total: 1 errors, 0 warnings, 0 checks, 176 lines checked b85e8d84cd91 drm/i915/preemption: Select timeout when scheduling c96747bc6976 drm/i915: Use a preemption timeout to enforce interactivity 7161c21aa08a drm/i915: Allow user control over preempt timeout on their important context _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
