== Series Details == Series: series starting with [v2,1/4] drm/i915: Enable edp psr error interrupts on hsw URL : https://patchwork.freedesktop.org/series/40704/ State : warning == Summary == $ dim checkpatch origin/drm-tip e0e155ae5044 drm/i915: Enable edp psr error interrupts on hsw -:109: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #109: FILE: drivers/gpu/drm/i915/i915_reg.h:4011: +#define EDP_PSR_ERROR (1<<2) ^ -:110: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #110: FILE: drivers/gpu/drm/i915/i915_reg.h:4012: +#define EDP_PSR_POST_EXIT (1<<1) ^ -:111: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #111: FILE: drivers/gpu/drm/i915/i915_reg.h:4013: +#define EDP_PSR_PRE_ENTRY (1<<0) ^ -:120: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #120: FILE: drivers/gpu/drm/i915/i915_reg.h:6821: +#define DE_EDP_PSR_INT_HSW (1<<19) ^ total: 0 errors, 0 warnings, 4 checks, 78 lines checked d27113364c8d drm/i915: Enable edp psr error interrupts on bdw+ -:158: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #158: FILE: drivers/gpu/drm/i915/intel_display.h:221: +#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ + for_each_if ((__mask) & (1 << (__t))) -:158: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects? #158: FILE: drivers/gpu/drm/i915/intel_display.h:221: +#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ + for_each_if ((__mask) & (1 << (__t))) -:159: CHECK:SPACING: No space is necessary after a cast #159: FILE: drivers/gpu/drm/i915/intel_display.h:222: + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ -:160: WARNING:SPACING: space prohibited between function name and open parenthesis '(' #160: FILE: drivers/gpu/drm/i915/intel_display.h:223: + for_each_if ((__mask) & (1 << (__t))) total: 1 errors, 1 warnings, 2 checks, 123 lines checked 07e5a8224b22 drm/i915/psr: Control PSR interrupts via debugfs f4ea75bae00f drm/i915/psr: Timestamps for PSR entry and exit interrupts. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
