On Thu, 2018-03-22 at 15:57 -0700, Rodrigo Vivi wrote:
> On Thu, Mar 22, 2018 at 02:48:39PM -0700, José Roberto de Souza
> wrote:
> > Without GTC enabled hardware is sending dummy aux frame sync value
> > that is not useful to sink do selective update, that is why it also
> > require that sink supports and requires the y-coordinate.
> >
> > So removing everything related to aux frame sync, if GTC is enabled
> > we can bring this back.
> >
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>
> Cc: Vathsala Nagaraju <vathsala.nagaraju@xxxxxxxxx>
>
> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> (but I would like to give a time for Vathsala to comment on this)
Okay, I will wait Vathsala comments to send another version.
Thanks
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 -
> > drivers/gpu/drm/i915/intel_psr.c | 23 +----------------------
> > 2 files changed, 1 insertion(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index c9c3b2ba6a86..7fe00509e51a 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -602,7 +602,6 @@ struct i915_psr {
> > struct delayed_work work;
> > unsigned busy_frontbuffer_bits;
> > bool psr2_support;
> > - bool aux_frame_sync;
> > bool link_standby;
> > bool y_cord_support;
> > bool colorimetry_support;
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index b8e083e10029..d46320a451d9 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -137,16 +137,9 @@ void intel_psr_init_dpcd(struct intel_dp
> > *intel_dp)
> >
> > if (INTEL_GEN(dev_priv) >= 9 &&
> > (intel_dp->psr_dpcd[0] & DP_PSR2_IS_SUPPORTED)) {
> > - uint8_t frame_sync_cap;
> >
> > dev_priv->psr.sink_support = true;
> > - if (drm_dp_dpcd_readb(&intel_dp->aux,
> > - DP_SINK_DEVICE_AUX_FRAME_SYN
> > C_CAP,
> > - &frame_sync_cap) != 1)
> > - frame_sync_cap = 0;
> > - dev_priv->psr.aux_frame_sync = frame_sync_cap &
> > DP_AUX_FRAME_SYNC_CAP;
> > - /* PSR2 needs frame sync as well */
> > - dev_priv->psr.psr2_support = dev_priv-
> > >psr.aux_frame_sync;
> > + dev_priv->psr.psr2_support = true;
> > DRM_DEBUG_KMS("PSR2 %s on sink",
> > dev_priv->psr.psr2_support ?
> > "supported" : "not supported");
> >
> > @@ -269,11 +262,6 @@ static void hsw_psr_enable_sink(struct
> > intel_dp *intel_dp)
> > struct drm_i915_private *dev_priv = to_i915(dev);
> >
> >
> > - /* Enable AUX frame sync at sink */
> > - if (dev_priv->psr.aux_frame_sync)
> > - drm_dp_dpcd_writeb(&intel_dp->aux,
> > - DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF
> > ,
> > - DP_AUX_FRAME_SYNC_ENABLE);
> > /* Enable ALPM at sink for psr2 */
> > if (dev_priv->psr.psr2_support && dev_priv->psr.alpm)
> > drm_dp_dpcd_writeb(&intel_dp->aux,
> > @@ -712,11 +700,6 @@ static void hsw_psr_disable(struct intel_dp
> > *intel_dp,
> > i915_reg_t psr_status;
> > u32 psr_status_mask;
> >
> > - if (dev_priv->psr.aux_frame_sync)
> > - drm_dp_dpcd_writeb(&intel_dp->aux,
> > - DP_SINK_DEVICE_AUX_FRAME_S
> > YNC_CONF,
> > - 0);
> > -
> > if (dev_priv->psr.psr2_support) {
> > psr_status = EDP_PSR2_STATUS;
> > psr_status_mask =
> > EDP_PSR2_STATUS_STATE_MASK;
> > @@ -860,10 +843,6 @@ static void intel_psr_exit(struct
> > drm_i915_private *dev_priv)
> > return;
> >
> > if (HAS_DDI(dev_priv)) {
> > - if (dev_priv->psr.aux_frame_sync)
> > - drm_dp_dpcd_writeb(&intel_dp->aux,
> > - DP_SINK_DEVICE_AUX_FRAME_S
> > YNC_CONF,
> > - 0);
> > if (dev_priv->psr.psr2_support) {
> > val = I915_READ(EDP_PSR2_CTL);
> > WARN_ON(!(val & EDP_PSR2_ENABLE));
> > --
> > 2.16.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
