== Series Details == Series: PSR interrupts URL : https://patchwork.freedesktop.org/series/40332/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3cde2d1d81fc drm/i915: Enable edp psr error interrupts on hsw -:106: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #106: FILE: drivers/gpu/drm/i915/i915_reg.h:3843: +#define EDP_PSR_ERROR (1<<2) ^ -:107: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #107: FILE: drivers/gpu/drm/i915/i915_reg.h:3844: +#define EDP_PSR_POST_EXIT (1<<1) ^ -:108: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #108: FILE: drivers/gpu/drm/i915/i915_reg.h:3845: +#define EDP_PSR_PRE_ENTRY (1<<0) ^ -:117: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #117: FILE: drivers/gpu/drm/i915/i915_reg.h:6647: +#define DE_EDP_PSR_INT_HSW (1<<19) ^ total: 0 errors, 0 warnings, 4 checks, 87 lines checked cf7b3fb92e87 drm/i915: Drop reg_write from the PSR mask 3bfc83341cb4 drm/i915: Enable edp psr error interrupts on bdw+ -:156: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #156: FILE: drivers/gpu/drm/i915/intel_display.h:221: +#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ + for_each_if ((__mask) & (1 << (__t))) -:156: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects? #156: FILE: drivers/gpu/drm/i915/intel_display.h:221: +#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ + for_each_if ((__mask) & (1 << (__t))) -:157: CHECK:SPACING: No space is necessary after a cast #157: FILE: drivers/gpu/drm/i915/intel_display.h:222: + for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \ -:158: WARNING:SPACING: space prohibited between function name and open parenthesis '(' #158: FILE: drivers/gpu/drm/i915/intel_display.h:223: + for_each_if ((__mask) & (1 << (__t))) total: 1 errors, 1 warnings, 2 checks, 123 lines checked 6dfdcd19a387 drm/i915/psr: Control PSR interrupts via debugfs d72b667b69d5 drm/i915/psr: Timestamps for PSR entry and exit interrupts. -:84: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #84: FILE: drivers/gpu/drm/i915/intel_psr.c:149: + } total: 0 errors, 0 warnings, 1 checks, 80 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
