Build up a large stockpile of requests, ~500,000, and feed them into the
system at 20KHz whilst simultaneously triggering set-wedged in order to
try and race i915_gem_set_wedged() against the engine->submit_request()
callback.
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
---
tests/gem_eio.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 249f5bff..a4bcee3d 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -34,12 +34,14 @@
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
+#include <signal.h>
#include <sys/ioctl.h>
#include <drm.h>
#include "igt.h"
#include "igt_sysfs.h"
+#include "i915/gem_ring.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO).");
@@ -452,6 +454,107 @@ static void test_inflight_internal(int fd)
trigger_reset(fd);
}
+static void notify(union sigval arg)
+{
+ sw_sync_timeline_inc(arg.sival_int, 1);
+}
+
+static void test_set_wedged(int fd)
+{
+#define NCTX 4096
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ const unsigned int ring_size = gem_measure_ring_inflight(fd, 0, 0) - 1;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj;
+ int dir = igt_debugfs_dir(fd);
+ struct itimerspec its;
+ struct sigevent sev;
+ uint32_t *contexts;
+ timer_t timer;
+ int timeline;
+ int syncpt;
+
+ contexts = calloc(NCTX, sizeof(*contexts));
+ igt_assert(contexts);
+
+ for (int n = 0; n < NCTX; n++)
+ contexts[n] = context_create_safe(fd);
+
+ memset(&obj, 0, sizeof(obj));
+ obj.handle = gem_create(fd, 4096);
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj);
+ execbuf.buffer_count = 1;
+ execbuf.flags = I915_EXEC_FENCE_IN;
+
+ for (unsigned int nctx = 1; nctx <= NCTX; nctx <<= 1) {
+ unsigned int nrq = ring_size;
+ if (!gem_has_execlists(fd)) {
+ nrq = (ring_size + nctx - 1) / nctx + 1;
+ nctx = ring_size / nrq;
+ }
+ igt_assert(nrq);
+ igt_assert(nctx);
+
+ timeline = sw_sync_timeline_create();
+
+ /* Build up a large orderly queue of requests */
+ syncpt = 1;
+ for (int m = 0; m < nrq; m++) {
+ for (int n = 0; n < nctx; n++) {
+ execbuf.rsvd1 = contexts[n];
+ execbuf.rsvd2 =
+ sw_sync_timeline_create_fence(timeline, syncpt);
+ gem_execbuf(fd, &execbuf);
+ close(execbuf.rsvd2);
+
+ syncpt++;
+ }
+ }
+ igt_debug("Queued %d requests over %d contexts\n",
+ syncpt, nctx);
+
+ igt_require(i915_reset_control(false));
+
+ /* Feed each request in at 20KHz */
+ memset(&sev, 0, sizeof(sev));
+ sev.sigev_notify = SIGEV_THREAD;
+ sev.sigev_value.sival_int = timeline;
+ sev.sigev_notify_function = notify;
+ igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
+
+ memset(&its, 0, sizeof(its));
+ its.it_interval.tv_sec = 0;
+ its.it_interval.tv_nsec = 5000;
+ its.it_value = its.it_interval;
+ igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
+ usleep(10);
+
+ igt_debug("Triggering wedge\n");
+ igt_sysfs_set(dir, "i915_wedged", "-1");
+
+ igt_debug("Disabling timer\n");
+ timer_delete(timer);
+ usleep(1000); /* timer_delete() doesn't flush pending signals */
+
+ igt_debug("Cleaning up\n");
+ close(timeline);
+
+ igt_assert(!gem_bo_busy(fd, obj.handle));
+
+ igt_assert(i915_reset_control(true));
+ trigger_reset(fd);
+ }
+
+ gem_close(fd, obj.handle);
+ for (int n = 0; n < NCTX; n++)
+ gem_context_destroy(fd, contexts[n]);
+ free(contexts);
+ close(dir);
+}
+
static int fd = -1;
static void
@@ -509,4 +612,9 @@ igt_main
igt_subtest("in-flight-suspend")
test_inflight_suspend(fd);
+
+ igt_subtest("set-wedged-racing") {
+ igt_require_sw_sync();
+ test_set_wedged(fd);
+ }
}
--
2.16.2
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