On Wed, 07 Mar 2018, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote: > On Wed, Mar 07, 2018 at 02:48:05PM -0800, Rafael Antognolli wrote: >> Matches bspec. >> >> Reviewed-by: Rafael Antognolli <rafael.antognolli@xxxxxxxxx> > > pushed, thanks Okay, too late now, but I think "Add Wa_2201832410" as a commit title is insufficient. Even a few words around it about the change would be appreciated. Thanks, Jani. > >> >> On Wed, Mar 07, 2018 at 02:09:12PM -0800, Rodrigo Vivi wrote: >> > "Clock gating bug in GWL may not clear barrier state when an EOT >> > is received, causing a hang the next time that barrier is used." >> > >> > HSDES: 2201832410 >> > >> > Cc: Rafael Antognolli <rafael.antognolli@xxxxxxxxx> >> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> >> > --- >> > drivers/gpu/drm/i915/i915_reg.h | 3 +++ >> > drivers/gpu/drm/i915/intel_pm.c | 5 +++++ >> > 2 files changed, 8 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> > index 4787d9bf58b9..e6a8c0ee7df1 100644 >> > --- a/drivers/gpu/drm/i915/i915_reg.h >> > +++ b/drivers/gpu/drm/i915/i915_reg.h >> > @@ -3965,6 +3965,9 @@ enum { >> > #define SARBUNIT_CLKGATE_DIS (1 << 5) >> > #define RCCUNIT_CLKGATE_DIS (1 << 7) >> > >> > +#define SUBSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9524) >> > +#define GWUNIT_CLKGATE_DIS (1 << 16) >> > + >> > #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434) >> > #define VFUNIT_CLKGATE_DIS (1 << 20) >> > >> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >> > index 6cab20ce167a..b8da4dcdd584 100644 >> > --- a/drivers/gpu/drm/i915/intel_pm.c >> > +++ b/drivers/gpu/drm/i915/intel_pm.c >> > @@ -8522,6 +8522,11 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv) >> > val |= SARBUNIT_CLKGATE_DIS; >> > I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val); >> > >> > + /* Wa_2201832410:cnl */ >> > + val = I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE); >> > + val |= GWUNIT_CLKGATE_DIS; >> > + I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE, val); >> > + >> > /* WaDisableVFclkgate:cnl */ >> > /* WaVFUnitClockGatingDisable:cnl */ >> > val = I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE); >> > -- >> > 2.13.6 >> > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx