On Tue, Mar 06, 2018 at 12:41:55PM +0200, Jani Nikula wrote:
> We don't want to preserve the DDI A 4 lane bit on ICL.
>
> Fixes: 3d2011cfa41f ("drm/i915/icl: remove port A/E lane sharing limitation.")
> Cc: Mahesh Kumar <mahesh1.kumar@xxxxxxxxx>
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index bfdaa5d86861..66417dd24bfc 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2932,9 +2932,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> intel_encoder->cloneable = 0;
>
> - intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> - (DDI_BUF_PORT_REVERSAL |
> - DDI_A_4_LANES);
> + if (INTEL_GEN(dev_priv) >= 11)
> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> + DDI_BUF_PORT_REVERSAL;
> + else
> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> + (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
> intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
> intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
>
> --
> 2.11.0
>
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--
Ville Syrjälä
Intel OTC
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