During GEM sanitization, we reset the GPU so that it's always in a default state whenever we take over or return the GPU back to the BIOS. We call the GPU reset directly, so that we don't get caught up in trying to handle GEM or KMS state that is isn't ready at that time, but now we have a couple of helpers to prepare and finish around the HW reset. Use them, so that we can extend them as required for updating HW state tracking around resets. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Cc: Michel Thierry <michel.thierry@xxxxxxxxx> Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index dcdcc09240b9..7ae9c877c1c6 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4874,6 +4874,8 @@ void i915_gem_sanitize(struct drm_i915_private *i915) mutex_unlock(&i915->drm.struct_mutex); } + intel_gpu_reset_prepare(i915, ALL_ENGINES); + /* * If we inherit context state from the BIOS or earlier occupants * of the GPU, the GPU may be in an inconsistent state when we @@ -4884,6 +4886,8 @@ void i915_gem_sanitize(struct drm_i915_private *i915) */ if (INTEL_GEN(i915) >= 5 && intel_has_gpu_reset(i915)) WARN_ON(intel_gpu_reset(i915, ALL_ENGINES)); + + intel_gpu_reset_finish(i915, ALL_ENGINES); } int i915_gem_suspend(struct drm_i915_private *dev_priv) -- 2.16.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
