This register is incorrectly listed as SNB/IVB only in the documentation. It turns out it's useful for one configuration on HSW (Compute Metrics Basic). Fixes: f89823c2122 "drm/i915/perf: Implement I915_PERF_ADD/REMOVE_CONFIG interface" Cc: Stable <stable@xxxxxxxxxxxxxxx> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_perf.c | 3 ++- drivers/gpu/drm/i915/i915_reg.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 2741b1bc7095..fbe3ac1e3e86 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -3019,7 +3019,8 @@ static bool gen7_is_valid_b_counter_addr(struct drm_i915_private *dev_priv, u32 (addr >= i915_mmio_reg_offset(OAREPORTTRIG1) && addr <= i915_mmio_reg_offset(OAREPORTTRIG8)) || (addr >= i915_mmio_reg_offset(OACEC0_0) && - addr <= i915_mmio_reg_offset(OACEC7_1)); + addr <= i915_mmio_reg_offset(OACEC7_1)) || + addr == i915_mmio_reg_offset(NOASELECT); } static bool gen7_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8c12ee2f89a9..4e991b69b117 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1155,6 +1155,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define HSW_MBVID2_MISR0 _MMIO(0x9EC0) +#define NOASELECT _MMIO(0x236C) + /* NOA (Gen8+) */ #define NOA_CONFIG(i) _MMIO(0x0D0C + (i) * 4) -- 2.16.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
