On 22/02/2018 08:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-02-22 08:09:07)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 71fdfb0451ef..7b6211061fba 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -74,6 +74,20 @@ enum intel_platform {
INTEL_MAX_PLATFORMS
};
+/* Subplatform flags share the same namespace per parent platform. */
+
+#define INTEL_SUBPLATFORM_BITS (2)
Enough space to do the same for GT (4 bits?) on top?
Nope, only 1 bit remains with this patch. Maybe 2 if Jani lets me do
BIT(platform - 1) for the mask. ;) You could also release your Gen1 bit. :D
Not sure if there is scope (makes sense or not) to free up some more
bits by downgrading some of the I9[146]5GM platforms to be subplatforms
of I9[146]G. G[M]45 also.
Or how IS_MOBILE fits in this scheme.
But anyway, not enough for gen in any case.
I think I've prototyped aggregated u64 platform+gen mask in some branch
though. It is a small code increase overall due 64 bit immediates.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx