On Wed, 21 Feb 2018 20:48:07 +0200 Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Currently we pin a fence on every plane doing tiled scanout. The > number of planes we have available is fast apporaching the number > of fences so we really should stop wasting them. Only FBC needs > the fence on gen4+, so let's use fences only for the primary planes > on those platforms. > > v2: drop the tiling check from plane_uses_fence() as the obj is > NULL during initial_plane_config() and we don't rally need the > check since i915_vma_pin_fence() does the check anyway > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 14 +++++++++++++- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_fbdev.c | 2 +- > 3 files changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c index > 66b269bc24b9..f2c1bb715e7b 100644 --- > a/drivers/gpu/drm/i915/intel_display.c +++ > b/drivers/gpu/drm/i915/intel_display.c @@ -2067,9 +2067,18 @@ static > unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, } > } > > +static bool intel_plane_uses_fence(const struct intel_plane_state > *plane_state) +{ > + struct intel_plane *plane = > to_intel_plane(plane_state->base.plane); > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > + > + return INTEL_GEN(dev_priv) < 4 || plane->id == PLANE_PRIMARY; > +} > + > struct i915_vma * > intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, > unsigned int rotation, > + bool uses_fence, > unsigned long *out_flags) > { > struct drm_device *dev = fb->dev; > @@ -2122,7 +2131,7 @@ intel_pin_and_fence_fb_obj(struct > drm_framebuffer *fb, if (IS_ERR(vma)) > goto err; > > - if (i915_vma_is_map_and_fenceable(vma)) { > + if (uses_fence && i915_vma_is_map_and_fenceable(vma)) { > int ret; > > /* Install a fence for tiled scan-out. Pre-i965 > always needs a @@ -2836,6 +2845,7 @@ > intel_find_initial_plane_obj(struct intel_crtc *intel_crtc, > intel_state->vma = intel_pin_and_fence_fb_obj(fb, > primary->state->rotation, > + > intel_plane_uses_fence(intel_state), &intel_state->flags); > mutex_unlock(&dev->struct_mutex); > if (IS_ERR(intel_state->vma)) { > @@ -12744,6 +12754,7 @@ intel_prepare_plane_fb(struct drm_plane > *plane, > vma = intel_pin_and_fence_fb_obj(fb, > new_state->rotation, > + > intel_plane_uses_fence(to_intel_plane_state(new_state)), > &to_intel_plane_state(new_state)->flags); if (!IS_ERR(vma)) > to_intel_plane_state(new_state)->vma = vma; > @@ -13162,6 +13173,7 @@ intel_legacy_cursor_update(struct drm_plane > *plane, } else { > vma = intel_pin_and_fence_fb_obj(fb, > new_plane_state->rotation, > + false, > &to_intel_plane_state(new_plane_state)->flags); > if (IS_ERR(vma)) { > DRM_DEBUG_KMS("failed to pin object\n"); > diff --git a/drivers/gpu/drm/i915/intel_drv.h > b/drivers/gpu/drm/i915/intel_drv.h index 50874f4035cf..e3f78fdae859 > 100644 --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1508,6 +1508,7 @@ void intel_release_load_detect_pipe(struct > drm_connector *connector, struct i915_vma * > intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, > unsigned int rotation, > + bool uses_fence, > unsigned long *out_flags); > void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); > struct drm_framebuffer * > diff --git a/drivers/gpu/drm/i915/intel_fbdev.c > b/drivers/gpu/drm/i915/intel_fbdev.c index 055f409f8b75..6f12adc06365 > 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c > +++ b/drivers/gpu/drm/i915/intel_fbdev.c > @@ -215,7 +215,7 @@ static int intelfb_create(struct drm_fb_helper > *helper, */ > vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, > DRM_MODE_ROTATE_0, > - &flags); > + false, &flags); > if (IS_ERR(vma)) { > ret = PTR_ERR(vma); > goto out_unlock; All these fence and fbc related changes will fix the gen9lp fence starvation problems from virtualization use cases. Thanks, Guang _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx