Quoting Mika Kuoppala (2018-02-19 13:59:43)
> Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:
>
> > The compiler is not automatically caching the i915->regs address inside
> > a register and emitting a load for every mmio access. For simple
> > functions like gen8_gt_irq_handler that are already using the raw
> > accessors, we can open-code them for substantial savings:
> >
> > add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-83 (-83)
> > Function old new delta
> > gen8_gt_irq_handler 290 266 -24
> > gen8_gt_irq_ack 181 122 -59
> > Total: Before=954637, After=954554, chg -0.01%
> >
> > v2: Add raw_reg_read/raw_reg_write.
> >
> > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> > ---
> > - if (master_ctl & GEN8_GT_VECS_IRQ) {
> > - gt_iir[3] = I915_READ_FW(GEN8_GT_IIR(3));
> > - if (gt_iir[3])
> > - I915_WRITE_FW(GEN8_GT_IIR(3), gt_iir[3]);
> > + if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
> > + gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));
> > + if (likely(gt_iir[2] & (i915->pm_rps_events |
> > + i915->pm_guc_events)))
> > + raw_reg_write(regs, GEN8_GT_IIR(2),
> > + gt_iir[2] & (i915->pm_rps_events |
> > + i915->pm_guc_events));
>
> I would gone as far as reg_read reg_write but that might be too far :)
Yeah, I went back to raw_ prefixes so that it has the reminder that
these do bypass all the niceties we have in our mmio vfuncs (tracing,
HW debugging, automatic handling of fw, locking, w/a handling etc).
> We leave te events hanging what are of no interest. As we are doing
> the masks with these so I find it peculiar that we dont ack
> everything as the masks should be in place and perhaps notify on
> events appearing without order in place for them.
It does seem odd indeed, I think we should just clear it as well. Can be
done later so that we don't rush headlong into a regression.
-Chris
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