Quoting Oscar Mateo (2018-02-15 22:46:45) > Move GT WAs appropiately from the current xxx_disp_workarounds_apply > function to the corresponding xxx_gt_workarounds_apply one. > > FIXME: It looks like Chris has found some WAs that actually live in > the context image. We need to move these to their rightful > xxx_workarounds_init function. > > v2: Rebased > v3: Rebased > > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > static void bdw_gt_workarounds_apply(struct drm_i915_private *dev_priv) > { > + /* The GTT cache must be disabled if the system is using 2M pages. */ > + bool can_use_gtt_cache = !HAS_PAGE_SIZES(dev_priv, > + I915_GTT_PAGE_SIZE_2M); > + /* WaSwitchSolVfFArbitrationPriority:bdw */ > + I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL); > + > + /* WaVSRefCountFullforceMissDisable:bdw */ > + /* WaDSRefCountFullforceMissDisable:bdw */ > + I915_WRITE(GEN7_FF_THREAD_MODE, > + I915_READ(GEN7_FF_THREAD_MODE) & > + ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME)); > + > + /* WaDisableSemaphoreAndSyncFlipWait:bdw */ > + I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL, > + _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE)); Or can we drop it? > + > + > + /* WaDisableSDEUnitClockGating:bdw */ > + I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > + GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > + > + > + /* WaProgramL3SqcReg1Default:bdw */ > + gen8_set_l3sqc_credits(dev_priv, 30, 2); > + > + /* WaGttCachingOffByDefault:bdw */ > + I915_WRITE(HSW_GTT_CACHE_EN, can_use_gtt_cache ? GTT_CACHE_EN_ALL : 0); > } _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx