Re: [PATCH 2/2] drm/i915: Fixup kerneldoc

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On Wed, Feb 14, 2018 at 01:49:22PM +0000, Chris Wilson wrote:
> drivers/gpu/drm/i915/intel_display.c:569: warning: Function parameter or member 'dev_priv' not described in 'intel_PLL_is_valid'
> drivers/gpu/drm/i915/intel_display.c:569: warning: Function parameter or member 'limit' not described in 'intel_PLL_is_valid'
> drivers/gpu/drm/i915/intel_display.c:569: warning: Function parameter or member 'clock' not described in 'intel_PLL_is_valid'
> drivers/gpu/drm/i915/intel_display.c:4769: warning: Function parameter or member 'crtc_state' not described in 'skl_update_scaler_plane'
> drivers/gpu/drm/i915/intel_display.c:4769: warning: Excess function parameter 'state' description in 'skl_update_scaler_plane'
> drivers/gpu/drm/i915/intel_display.c:4967: warning: Function parameter or member 'new_crtc_state' not described in 'intel_post_enable_primary'
> drivers/gpu/drm/i915/intel_display.c:12650: warning: Function parameter or member 'new_state' not described in 'intel_prepare_plane_fb'
> drivers/gpu/drm/i915/intel_display.c:12650: warning: Excess function parameter 'fb' description in 'intel_prepare_plane_fb'
> drivers/gpu/drm/i915/intel_display.c:12763: warning: Function parameter or member 'old_state' not described in 'intel_cleanup_plane_fb'
> drivers/gpu/drm/i915/intel_display.c:12763: warning: Excess function parameter 'fb' description in 'intel_cleanup_plane_fb'

No sure a lot of the kernel doc we have makes any sense, but migth as
well fix it I suppose.

Series is
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

> 
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 30e38cbeface..286a9591d179 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -558,11 +558,11 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)
>  }
>  
>  #define INTELPllInvalid(s)   do { /* DRM_DEBUG(s); */ return false; } while (0)
> -/**
> +
> +/*
>   * Returns whether the given set of divisors are valid for a given refclk with
>   * the given connectors.
>   */
> -
>  static bool intel_PLL_is_valid(struct drm_i915_private *dev_priv,
>  			       const struct intel_limit *limit,
>  			       const struct dpll *clock)
> @@ -4756,8 +4756,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state)
>  
>  /**
>   * skl_update_scaler_plane - Stages update to scaler state for a given plane.
> - *
> - * @state: crtc's scaler state
> + * @crtc_state: crtc's scaler state
>   * @plane_state: atomic plane state to update
>   *
>   * Return
> @@ -4954,6 +4953,7 @@ static void intel_crtc_dpms_overlay_disable(struct intel_crtc *intel_crtc)
>  /**
>   * intel_post_enable_primary - Perform operations after enabling primary plane
>   * @crtc: the CRTC whose primary plane was just enabled
> + * @new_crtc_state: the enabling state
>   *
>   * Performs potentially sleeping operations that must be done after the primary
>   * plane is enabled, such as updating FBC and IPS.  Note that this may be
> @@ -12633,7 +12633,7 @@ static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
>  /**
>   * intel_prepare_plane_fb - Prepare fb for usage on plane
>   * @plane: drm plane to prepare for
> - * @fb: framebuffer to prepare for presentation
> + * @new_state: the plane state being prepared
>   *
>   * Prepares a framebuffer for usage on a display plane.  Generally this
>   * involves pinning the underlying object and updating the frontbuffer tracking
> @@ -12751,7 +12751,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
>  /**
>   * intel_cleanup_plane_fb - Cleans up an fb after plane use
>   * @plane: drm plane to clean up for
> - * @fb: old framebuffer that was on plane
> + * @old_state: the state from the previous modeset
>   *
>   * Cleans up a framebuffer that has just been removed from a plane.
>   *
> -- 
> 2.16.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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