> -----Original Message----- > From: Sharma, Shashank > Sent: Wednesday, February 7, 2018 9:22 PM > To: Srinivas, Vidya <vidya.srinivas@xxxxxxxxx>; intel- > gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: maarten.lankhorst@xxxxxxxxxxxxxxx; Kamath, Sunil > <sunil.kamath@xxxxxxxxx>; Shankar, Uma <uma.shankar@xxxxxxxxx>; > Kumar, Mahesh1 <mahesh1.kumar@xxxxxxxxx> > Subject: Re: [PATCH 03/16] drm/i915/skl+: add NV12 in > skl_format_to_fourcc > > Regards > > Shashank > > > On 2/6/2018 6:28 PM, Vidya Srinivas wrote: > > From: Mahesh Kumar <mahesh1.kumar@xxxxxxxxx> > > > > Add support of recognizing DRM_FORMAT_NV12 from plane_format > register > > value. > > > > Signed-off-by: Mahesh Kumar <mahesh1.kumar@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_display.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c > > b/drivers/gpu/drm/i915/intel_display.c > > index 60ba5bb..e3a6a7f 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -2626,6 +2626,8 @@ static int skl_format_to_fourcc(int format, bool > rgb_order, bool alpha) > > switch (format) { > > case PLANE_CTL_FORMAT_RGB_565: > > return DRM_FORMAT_RGB565; > > + case PLANE_CTL_FORMAT_NV12: > > + return DRM_FORMAT_NV12; > I dont think this is correct, the case PLANE_CTL_FORMAT_NV12 is defined as > (1 << 24) but when I check bspec definition, 24th bit is set for > P010/12/16 formats. AFAIK NV12 is 8 bit format whereas P0xx formats are > 10/12/16 bit formats (they both are YCBCR 4:2:0 of course). This means we > have mixed NV12 format with P0xx formats. When I checked the definition > of DRM_FORMAT_NV12, I am not sure if that's intended for this. Ville, I saw > that the DRM_FORMAT_NV12 definition was added by you, can you please > comment if this is the right usage ? > Upto Gen10 24-27 bits of PLANE_CTL will be used for format. ICL onwards 23rd bit is also used. PLANE_CTL_FORMAT_MASK has been defined in i915_reg.h and mapping will be same if 23rd bit is 0. For NV12, 1<< 24 thus holds good for all Gen. > > default: > > case PLANE_CTL_FORMAT_XRGB_8888: > > if (rgb_order) { _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx