Quoting Daniele Ceraolo Spurio (2018-02-07 21:24:40)
> Since commit 5896a5c8c9c0 (drm/i915: Always stop the rings before a
> missing GPU reset) we attempt to stop the engines during gem_sanitize
> even if reset=0 and nothing bad happened on the gpu.
> The specs says that the STOP_RINGS bit needs to be cleared to resume
> normal operation, but for some reason the value of the bit seems to be
> changing without us writing to it (maybe rc6 entry/exit?), so normal
> operation resumes correctly. However, it still feels incorrect to stop
> the engines if there hasn't been any issue so skip the whole reset
> call in gem_sanitize if i915.reset=0
>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index c1b80cd52f9e..beb351cb7a12 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4882,10 +4882,8 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
> * it may impact the display and we are uncertain about the stability
> * of the reset, so this could be applied to even earlier gen.
> */
> - if (INTEL_GEN(i915) >= 5) {
> - int reset = intel_gpu_reset(i915, ALL_ENGINES);
> - WARN_ON(reset && reset != -ENODEV);
> - }
> + if (INTEL_GEN(i915) >= 5 && intel_has_gpu_reset(i915))
> + WARN_ON(intel_gpu_reset(i915, ALL_ENGINES));
I'll buy just because it makes the code tidier and should make the
warning more understandable, otherwise I look at i915.reset=0 (or lack of
reset implementation) as something that should be fixed rather than
worked around.
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
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