Signed-off-by: Vidya Srinivas <vidya.srinivas@xxxxxxxxx> --- drivers/gpu/drm/drm_fourcc.c | 3 +++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++++++++--- drivers/gpu/drm/i915/intel_sprite.c | 12 +++++++++--- include/uapi/drm/drm_fourcc.h | 3 +++ 5 files changed, 39 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index cf70e79..0468203 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c @@ -176,6 +176,9 @@ const struct drm_format_info *__drm_format_info(u32 format) { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 }, { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 }, + { .format = DRM_FORMAT_V210, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1 }, + { .format = DRM_FORMAT_V212, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1 }, + { .format = DRM_FORMAT_V216, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1 }, }; unsigned int i; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5864030..9ad7cd5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6403,6 +6403,9 @@ enum { #define PLANE_CTL_FORMAT_Y410 (7 << 24) #define PLANE_CTL_FORMAT_Y412 (9 << 24) #define PLANE_CTL_FORMAT_Y416 (0xB << 24) +#define PLANE_CTL_FORMAT_V210 (1 << 24) +#define PLANE_CTL_FORMAT_V212 (3 << 24) +#define PLANE_CTL_FORMAT_V216 (5 << 24) #define _PLANE_CTL_1_B 0x71180 #define _PLANE_CTL_2_B 0x71280 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 546c79b..567d8df 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -90,6 +90,9 @@ static const uint32_t skl_primary_formats[] = { DRM_FORMAT_Y410, DRM_FORMAT_Y412, DRM_FORMAT_Y416, + DRM_FORMAT_V210, + DRM_FORMAT_V212, + DRM_FORMAT_V216, }; static const uint64_t skl_format_modifiers_noccs[] = { @@ -3424,6 +3427,12 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format) return PLANE_CTL_FORMAT_Y412; case DRM_FORMAT_Y416: return PLANE_CTL_FORMAT_Y416; + case DRM_FORMAT_V210: + return PLANE_CTL_FORMAT_V210 | PLANE_CTL_YUV422_YUYV; + case DRM_FORMAT_V212: + return PLANE_CTL_FORMAT_V212 | PLANE_CTL_YUV422_YUYV; + case DRM_FORMAT_V216: + return PLANE_CTL_FORMAT_V216 | PLANE_CTL_YUV422_YUYV; default: MISSING_CASE(pixel_format); } @@ -4807,6 +4816,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, case DRM_FORMAT_Y410: case DRM_FORMAT_Y412: case DRM_FORMAT_Y416: + case DRM_FORMAT_V210: + case DRM_FORMAT_V212: + case DRM_FORMAT_V216: break; default: DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n", @@ -12954,6 +12966,9 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier) case DRM_FORMAT_YVYU: case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: + case DRM_FORMAT_V210: + case DRM_FORMAT_V212: + case DRM_FORMAT_V216: if (modifier == I915_FORMAT_MOD_Yf_TILED) return true; /* fall through */ @@ -13202,9 +13217,9 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) num_formats = ARRAY_SIZE(skl_primary_formats); if (INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) - num_formats -= 4; + num_formats -= 7; else if (INTEL_GEN(dev_priv) == 9) - num_formats -= 3; + num_formats -= 6; if (skl_plane_has_ccs(dev_priv, pipe, PLANE_PRIMARY)) modifiers = skl_format_modifiers_ccs; @@ -14003,6 +14018,9 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, case DRM_FORMAT_UYVY: case DRM_FORMAT_YVYU: case DRM_FORMAT_VYUY: + case DRM_FORMAT_V210: + case DRM_FORMAT_V212: + case DRM_FORMAT_V216: if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) { DRM_DEBUG_KMS("unsupported pixel format: %s\n", drm_get_format_name(mode_cmd->pixel_format, &format_name)); @@ -14017,7 +14035,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, goto err; } break; - case DRM_FORMAT_Y410 + case DRM_FORMAT_Y410: case DRM_FORMAT_Y412: case DRM_FORMAT_Y416: if (INTEL_GEN(dev_priv) < 10) { diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 2a2baa2..a06576f 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1165,6 +1165,9 @@ static uint32_t skl_plane_formats[] = { DRM_FORMAT_Y410, DRM_FORMAT_Y412, DRM_FORMAT_Y416, + DRM_FORMAT_V210, + DRM_FORMAT_V212, + DRM_FORMAT_V216, }; static const uint64_t skl_plane_format_modifiers_noccs[] = { @@ -1193,7 +1196,7 @@ static bool g4x_mod_supported(uint32_t format, uint64_t modifier) case DRM_FORMAT_YVYU: case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: - if (modifier == DRM_FORMAT_MOD_LINEAR || + if (modifier == DRM_FORMAT_MOD_LINEAR || modifier == I915_FORMAT_MOD_X_TILED) return true; /* fall through */ @@ -1261,6 +1264,9 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier) case DRM_FORMAT_YVYU: case DRM_FORMAT_UYVY: case DRM_FORMAT_VYUY: + case DRM_FORMAT_V210: + case DRM_FORMAT_V212: + case DRM_FORMAT_V216: if (modifier == I915_FORMAT_MOD_Yf_TILED) return true; /* fall through */ @@ -1365,9 +1371,9 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) || (pipe == PIPE_C))) - num_plane_formats -= 4; + num_plane_formats -= 7; else if (INTEL_GEN(dev_priv) <= 10) - num_plane_formats -= 3; + num_plane_formats -= 6; if (skl_plane_has_ccs(dev_priv, pipe, PLANE_SPRITE0 + plane)) modifiers = skl_plane_format_modifiers_ccs; diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index c7922d3..a82f74a 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -117,6 +117,9 @@ extern "C" { #define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [64:0] A:V:Y:U 12:12:12:12 little endian */ #define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [64:0] A:V:Y:U 16:16:16:16 little endian */ +#define DRM_FORMAT_V210 fourcc_code('V', '2', '1', '0') /* [31:0] A:V:Y:U 2:10:10:10 little endian */ +#define DRM_FORMAT_V212 fourcc_code('V', '2', '1', '2') /* [64:0] A:V:Y:U 12:12:12:12 little endian */ +#define DRM_FORMAT_V216 fourcc_code('V', '2', '1', '6') /* [64:0] A:V:Y:U 16:16:16:16 little endian */ /* * 2 plane RGB + A -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx