Hi These are 6 selected patches form the series "ICL display initialization and some plane bits". Only patch 2 still needs review, the others are already reviewed. The original series of 17 patches triggered some CI errors that definitely seem to be the fault of the series. Some of the patches were reviewed and then sent as part of a new series and were merged because they didn't trigger the CI failures. Now I'm sending another subset of the patches in the hope that the CI failures won't be triggered again. Then we'll only have a few remaining patches to investigate the problem later. Thanks, Paulo Mahesh Kumar (3): drm/i915/icl: Enable both DBuf slices during init drm/i915/icl: initialize MBus during display init drm/i915/icl: program mbus during pipe enable Paulo Zanoni (3): drm/i915/icl: add ICL support to cnl_set_procmon_ref_values drm/i915/icl: add the main CDCLK functions drm/i915/icl: implement the display init/uninit sequences drivers/gpu/drm/i915/i915_reg.h | 75 +++++++--- drivers/gpu/drm/i915/intel_cdclk.c | 235 +++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_display.c | 20 +++ drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_runtime_pm.c | 146 ++++++++++++++++++-- 5 files changed, 450 insertions(+), 28 deletions(-) -- 2.14.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
