On Sat, 03 Feb 2018, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> Quoting Chris Wilson (2018-01-25 22:41:22)
>> Provide the reason why we call intel_fbc_deactivate() so that debugging
>> issues with FBC being delayed is clearer.
>>
>> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
>
> Any takers?
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>
>> ---
>> drivers/gpu/drm/i915/intel_fbc.c | 17 ++++++++++-------
>> 1 file changed, 10 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
>> index a8a8a80497a8..80682a418a70 100644
>> --- a/drivers/gpu/drm/i915/intel_fbc.c
>> +++ b/drivers/gpu/drm/i915/intel_fbc.c
>> @@ -492,7 +492,8 @@ static void intel_fbc_schedule_activation(struct intel_crtc *crtc)
>> schedule_work(&work->work);
>> }
>>
>> -static void intel_fbc_deactivate(struct drm_i915_private *dev_priv)
>> +static void intel_fbc_deactivate(struct drm_i915_private *dev_priv,
>> + const char *reason)
>> {
>> struct intel_fbc *fbc = &dev_priv->fbc;
>>
>> @@ -505,6 +506,8 @@ static void intel_fbc_deactivate(struct drm_i915_private *dev_priv)
>>
>> if (fbc->active)
>> intel_fbc_hw_deactivate(dev_priv);
>> +
>> + fbc->no_fbc_reason = reason;
>> }
>>
>> static bool multiple_pipes_ok(struct intel_crtc *crtc,
>> @@ -923,6 +926,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc,
>> {
>> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> struct intel_fbc *fbc = &dev_priv->fbc;
>> + const char *reason = "update pending";
>>
>> if (!fbc_supported(dev_priv))
>> return;
>> @@ -930,7 +934,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc,
>> mutex_lock(&fbc->lock);
>>
>> if (!multiple_pipes_ok(crtc, plane_state)) {
>> - fbc->no_fbc_reason = "more than one pipe active";
>> + reason = "more than one pipe active";
>> goto deactivate;
>> }
>>
>> @@ -940,7 +944,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc,
>> intel_fbc_update_state_cache(crtc, crtc_state, plane_state);
>>
>> deactivate:
>> - intel_fbc_deactivate(dev_priv);
>> + intel_fbc_deactivate(dev_priv, reason);
>> unlock:
>> mutex_unlock(&fbc->lock);
>> }
>> @@ -973,9 +977,8 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
>> intel_fbc_reg_params_equal(&old_params, &fbc->params))
>> return;
>>
>> - intel_fbc_deactivate(dev_priv);
>> + intel_fbc_deactivate(dev_priv, "FBC enabled (active or scheduled)");
>> intel_fbc_schedule_activation(crtc);
>> - fbc->no_fbc_reason = "FBC enabled (active or scheduled)";
>> }
>>
>> void intel_fbc_post_update(struct intel_crtc *crtc)
>> @@ -1016,7 +1019,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
>> fbc->busy_bits |= intel_fbc_get_frontbuffer_bit(fbc) & frontbuffer_bits;
>>
>> if (fbc->enabled && fbc->busy_bits)
>> - intel_fbc_deactivate(dev_priv);
>> + intel_fbc_deactivate(dev_priv, "frontbuffer write");
>>
>> mutex_unlock(&fbc->lock);
>> }
>> @@ -1246,7 +1249,7 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work)
>> DRM_DEBUG_KMS("Disabling FBC due to FIFO underrun.\n");
>> fbc->underrun_detected = true;
>>
>> - intel_fbc_deactivate(dev_priv);
>> + intel_fbc_deactivate(dev_priv, "FIFO underrun");
>> out:
>> mutex_unlock(&fbc->lock);
>> }
>> --
>> 2.15.1
>>
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--
Jani Nikula, Intel Open Source Technology Center
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