Quoting Tvrtko Ursulin (2018-02-05 09:47:52) > > On 05/02/2018 09:11, Chris Wilson wrote: > > The pmu_event_read() callchain is in an atomic context which then > > Call-chain. > > > forbids us sleeping, such as required to wake the device up for rpm. > > In this case, we can only read our registers iff the device is already > > s/iff/if/ iff == if and only if > > awake. In the case of rc6 this means that we cannot report the latest > > values when the whole system is asleep. > > --- > > drivers/gpu/drm/i915/i915_pmu.c | 29 +++++++++++++++++------------ > > drivers/gpu/drm/i915/i915_pmu.h | 1 + > > 2 files changed, 18 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > > index ecb0198bfb7a..9c50b173e9a1 100644 > > --- a/drivers/gpu/drm/i915/i915_pmu.c > > +++ b/drivers/gpu/drm/i915/i915_pmu.c > > @@ -423,18 +423,23 @@ static u64 __i915_pmu_event_read(struct perf_event *event) > > val = count_interrupts(i915); > > break; > > case I915_PMU_RC6_RESIDENCY: > > - intel_runtime_pm_get(i915); > > - val = intel_rc6_residency_ns(i915, > > - IS_VALLEYVIEW(i915) ? > > - VLV_GT_RENDER_RC6 : > > - GEN6_GT_GFX_RC6); > > - if (HAS_RC6p(i915)) > > - val += intel_rc6_residency_ns(i915, > > - GEN6_GT_GFX_RC6p); > > - if (HAS_RC6pp(i915)) > > - val += intel_rc6_residency_ns(i915, > > - GEN6_GT_GFX_RC6pp); > > - intel_runtime_pm_put(i915); > > + if (intel_runtime_pm_get_if_in_use(i915)) { > > + val = intel_rc6_residency_ns(i915, > > + IS_VALLEYVIEW(i915) ? > > + VLV_GT_RENDER_RC6 : > > + GEN6_GT_GFX_RC6); > > + if (HAS_RC6p(i915)) > > + val += intel_rc6_residency_ns(i915, > > + GEN6_GT_GFX_RC6p); > > + if (HAS_RC6pp(i915)) > > + val += intel_rc6_residency_ns(i915, > > + GEN6_GT_GFX_RC6pp); > > + intel_runtime_pm_put(i915); > > + > > + i915->pmu.sample[__I915_SAMPLE_RC6].cur = val; > > + } else { > > + val = i915->pmu.sample[__I915_SAMPLE_RC6].cur; > > + } > > Downside is that idle system, when auto-suspended, will show 0% RC6. But > I have no alternative ideas. :( And when it wakes back up >100% RC6 for an interval. Unpleasant. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx