Quoting Chris Wilson (2018-01-26 21:39:28) > Quoting Chris Wilson (2018-01-25 21:28:49) > > It is taking longer than a couple of seconds for the FBC worker to be > > executed after scheduling; and then will take a minimum of a vblank > > interval for it activate. So wait longer to reduce the flip flops. > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Any acks? Still looking for a response here. CI says that 2s isn't enough for FBC to kick in (it spends most of that time waiting for an invalidate, and then at the every end about 5ms waiting for the next vblank). In terms of human response, we don't care so much how long it takes to enable FBC, but how long it takes to disable; similarly for PSR. The downside to it taking longer than expected to enable FBC is power consumption. Is the display block hooked up to rapl? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
