Hi Rodrigo, this is what I had in mind for the DP CNL and VBT rate limiting, I hope you don't mind me writing the patches. It was easier to express myself in C than English. BR, Jani. Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> Jani Nikula (3): drm/i915/dp: abstract rate array length limiting drm/i915/dp: clean up source rate limiting for cnl drm/i915/dp: limit DP link rate based on VBT on CNL+ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_bios.c | 21 ++++++++++++ drivers/gpu/drm/i915/intel_dp.c | 63 ++++++++++++++++++++++------------- drivers/gpu/drm/i915/intel_vbt_defs.h | 5 +++ 4 files changed, 67 insertions(+), 23 deletions(-) -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
