On Sat, Jan 27, 2018 at 02:49:18AM +0000, Dhinakaran Pandiyan wrote: > The cap check should be specifically for bit 0 instead of any bit. > Any "Fixes:" ? > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index a1b878449e83..83874bcd1142 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -107,7 +107,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) > DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP, > &frame_sync_cap) != 1) > frame_sync_cap = 0; > - dev_priv->psr.aux_frame_sync = frame_sync_cap ? true : false; > + dev_priv->psr.aux_frame_sync = frame_sync_cap & DP_AUX_FRAME_SYNC_CAP; > /* PSR2 needs frame sync as well */ > dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync; > DRM_DEBUG_KMS("PSR2 %s on sink", > -- > 2.14.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx