On Tue, 2018-01-30 at 16:44 +0000, Chris Wilson wrote: > This is a precautionary measure as I have no evidence to suggest we've > hit a bug here (I was hoping this might explain gdg's odd behaviour, but > alas), but given that we have a function to flush the ggtt writes it > seems prudent to use it prior to changing the fence register. Due to the > intrinsic nature of the GTT often operating as an independent mmio path, > we should not just rely on the write to the fence acting as a full flush > for GTT writes. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas --------------------------------------------------------------------- Intel Finland Oy Registered Address: PL 281, 00181 Helsinki Business Identity Code: 0357606 - 4 Domiciled in Helsinki This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
